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Digital Circuits - Logic Gates
Digital electrical circuits run on logic low and logic high voltages
...
" Similar to this, the number "1" designates the voltage
range equivalent to Logic High
...
Thus, the core elements of
any digital system are logic gates
...

•
•
•

Basic gates
Universal gates
Special gates

Now, let us discuss about the Logic gates come under each
category one by one
...
We can thus construct these Boolean
functions using straightforward gates
...

AND gate
An AND gate is a digital circuit that has two or more inputs and
produces an output, which is the logical AND of all those inputs
...


The following table shows the truth table of 2-input AND gate
...
B

0

0

0

0

1

0

1

0

0

1

1

1

Here A, B are the inputs and Y is the output of two input AND
gate
...
For
remaining combinations of inputs, the output, Y is ‘0’
...


This AND gate produces an output YY, which is the logical AND of
two inputs A, B
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That means, the output of AND gate will be ‘1’, when all
the inputs are ‘1’
...

This logical OR is represented with the symbol ‘+’
...

A

B

Y=A+B

0

0

0

0

1

1

1

0

1

1

1

1

Here, the two input OR gate's inputs are A and B, and its output
is Y
...
" For all other
input/output combinations, Y is "1"
...
It has one
output, Y, and two inputs, A and B
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This indicates that
when at least one of the inputs is "1," the output of an OR gate
will be "1"
...
The output of NOT gate is the logical inversion of input
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The following table shows the truth table of NOT gate
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If the input, A is ‘0’, then the output, Y is ‘1’
...

The following figure shows the symbol of NOT gate, which is
having one input, A and one output, Y
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Universal gates

an

output YY,

which

is

The terms "universal gates" refer to NAND and NOR gates
...
Similar to
that, any Boolean function in product of sums form can be
implemented using only NOR gates
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The following table shows the truth table of 2-input NAND gate
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BA
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When both inputs are ‘1’, the output, Y is ‘0’
...
This is just opposite
to that of two input AND gate operation
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NAND gate operation is same as that of AND gate followed by an
inverter
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NOR gate
NOR gate is a digital circuit that has two or more inputs and
produces an output, which is the inversion of logical OR of all
those inputs
...
If both inputs are
‘0’, then the output, Y is ‘1’
...
This is just opposite to that of two input OR
gate operation
...


NOR gate operation is same as that of OR gate followed by an
inverter
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Special Gates
Ex-OR & Ex-NOR gates are called as special gates
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Ex-OR gate
The full form of Ex-OR gate is Exclusive-OR gate
...

The following table shows the truth table of 2-input Ex-OR gate
...
The truth table of Ex-OR gate is same as that of OR gate for
first three rows
...
That
means, the output YY is zero instead of one, when both the
inputs are one, since the inputs having even number of ones
...
And it is zero, when both inputs are same
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Ex-OR gate operation is similar to that of OR gate, except for few
combinationss of inputs
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The output of Ex-OR gate is ‘1’, when odd
number of ones present at the inputs
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Ex-NOR gate
The full form of Ex-NOR gate is Exclusive-NOR gate
...


The following table shows the truth table of 2-input Ex-NOR
gate
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The truth table of
Ex-NOR gate is same as that of NOR gate for first three rows
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That means, the output is
one instead of zero, when both the inputs are one
...
And it is zero, when both the inputs are different
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Ex-NOR gate operation is similar to that of NOR gate, except for
few combinationss of inputs
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The output of Ex-NOR gate is ‘1’, when
even number of ones present at the inputs
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From the above truth tables of Ex-OR & Ex-NOR logic gates, we
can easily notice that the Ex-NOR operation is just the logical
inversion of Ex-OR operation
...
That means, irrespective of
total number of logic gates, the maximum number of Logic gates
that are present cascadedcascaded between any input and
output is two in two level logic
...

Consider the four Logic gates AND, OR, NAND & NOR
...
Those are AND-AND, AND-OR, ANDNAND, ANDNOR, OR-AND, OR-OR, OR-NAND, OR-NOR, NAND-AND, NANDOR, NANDNAND, NAND-NOR, NOR-AND, NOR-OR, NOR-NAND,
NOR-NOR
...

•
•

Degenerative form
Non-degenerative form

Degenerative Form
If the output of two level logic realization can be obtained by
using single Logic gate, then it is called as degenerative form
...

Due to this, the fan-in of Logic gate increases
...

Only 6 combinations of two level logic realizations out of 16
combinations come under degenerative form
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In this section, let us discuss some realizations
...

AND-AND Logic
In this logic realization, AND gates are present in both levels
...


We will get the outputs of first level logic gates
as Y1=ABY1=AB and Y2=CDY2=CD
These outputs, Y1Y1 and Y2Y2 are applied as inputs of AND gate
that is present in second level
...

Y=(AB)(CD)Y=(AB)(CD)
⇒Y=ABCD⇒Y=ABCD
Therefore, the output of this AND-AND logic realization is ABCD
...
Hence, it is degenerative form
...
The following figure
shows an example for AND-NAND logic realization
...
So, the output of this NAND
gate is
Y=(Y1Y2)′Y=(Y1Y2)′
Substitute Y1Y1 and Y2Y2 values in the above equation
...
This Boolean function can be implemented by
using a 4 input NAND gate
...

OR-OR Logic
In this logic realization, OR gates are present in both levels
...


We will get the outputs of first level logic gates
as Y1=A+BY1=A+B and Y2=C+DY2=C+D
...
So, the output of this OR gate is
Y=Y1+Y2Y=Y1+Y2
Substitute Y1Y1 and Y2Y2 values in the above equation
...

This Boolean function can be implemented by using a 4 input OR
gate
...

Similarly, you can verify whether the remaining realizations
belong to this category or not
...

The remaining 10 combinations of two level logic realizations
come under nondegenerative form
...

Now, let us discuss some realizations
...

AND-OR Logic
In this logic realization, AND gates are present in first level and
OR gatess are present in second level
...


Previously, we got the outputs of first level logic gates
as Y1=ABY1=AB and Y2=CDY2=CD
...
So, the output of this OR gate is
Y=Y1+Y2Y=Y1+Y2
Substitute Y1Y1 and Y2Y2 values in the above equation
Y=AB+CDY=AB+CD
Therefore, the output of this AND-OR logic realization is AB+CD
...
Since, we can’t
implement it by using single logic gate, this AND-OR logic
realization is a non-degenerative form
...
The following figure
shows an example for AND-NOR logic realization
...
So, the output of this NOR gate is
Y=(Y1+Y2)′Y=(Y1+Y2)′
Substitute Y1Y1 and Y2Y2 values in the above equation
...
This Boolean function is in AND-ORInvert form
...
The following figure shows an
example for OR-AND logic realization
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These outputs, Y1Y1 and Y2Y2 are applied as inputs of AND gate
that is present in second level
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Y=(A+B)(C+D)Y=(A+B)(C+D)
Therefore, the output of this OR-AND logic realization
is A+BA+B C+DC+D
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Since, we can’t implement it by using single logic
gate, this OR-AND logic realization is a non-degenerative form
...


Digital Combinational Circuits
Combinational circuits consist of Logic gates
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The outputss of combinational
circuit depends on the combination of present inputs
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This combinational circuit has ‘n’ input variables and ‘m’ outputs
...


Design procedure of Combinational circuits
• Find the required number of input variables and
outputs from given specifications
...
If there are ‘n’ input
variables, then there will be 2n possible combinations
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• Find the Boolean expressions for each output
...

• Implement
the above Boolean expressions
corresponding to each output by using Logic gates
...

The converters, which convert one code to other code are called
as code converters
...

Example
Binary code to Gray code converter
Let us implement a converter, which converts a 4-bit binary code
WXYZ into its equivalent Gray code ABCD
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Binary code
WXYZ

WXYZ Gray code
ABCD

0000

0000

0001

0001

0010

0011

0011

0010

0100

0110

0101

0111

0110

0101

0111

0100

1000

1100

1001

1101

1010

1111

1011

1110

1100

1010

1101

1011

1110

1001

1111

1000

From Truth table, we can write the Boolean functions for each
output bit of Gray code as below
...

The following figure shows
simplifying Boolean function, A
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The following figure shows
simplifying Boolean function, B
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After grouping, we will
get B as
B=W′X+WX′=W⊕XB=W′X+WX′=W⊕X
Similarly, we will get the following Boolean functions for C & D
after simplifying
...


Since the outputs depend only on the present inputs, this 4-bit
Binary code to Gray code converter is a combinational circuit
...

Parity Bit Generator
There are two types of parity bit generators based on the type of
parity bit being generated
...
Similarly, odd parity generator generates an odd
parity bit
...
It generates an even parity bit, P
...
For other

combinations of input, even parity bit, P should be ‘0’
...

Binary Input WXY

Even Parity bit P

000

0

001

1

010

1

011

0

100

1

101

0

110

0

111

1

From the above Truth table, we can write the Boolean
function for even parity bit as
P=W′X′Y+W′XY′+WX′Y′+WXYP=W′X′Y+W′XY′+WX′Y′+WXY
⇒P=W′(X′Y+XY′)+W(X′Y′+XY)⇒P=W′(X′Y+XY′)+W(X′Y′+XY)
⇒P=W′(X⊕Y)+W(X⊕Y)′=W⊕X⊕Y⇒P=W′(X⊕Y)+W(X⊕Y)′=W
⊕X⊕Y

The following figure shows the circuit diagram of even parity
generator
...
First ExclusiveOR gate having two inputs W & X and
produces an output W ⊕ X
...
The other input of this second
Exclusive-OR gate is Y and produces an output of W ⊕ X ⊕ Y
...
For other combinations of input, odd parity bit, P should
be ‘0’
...
The circuit diagram of odd
parity generator is shown in the following figure
...
Since the odd parity is just opposite
to even parity, we can place an inverter at the output of even
parity generator
...

Parity Checker
There are two types of parity checkers based on the type of
parity has to be checked
...
Similarly, odd parity checker checks error in the
transmitted data, which contains message bits along with odd
parity
...
Assume a
3-bit binary input, WXY is transmitted along with an even parity
bit, P
...

It generates an even parity check bit, E
...
That means,
there is no error in the received data
...

That means, there is an error in the received data
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4-bit Received Data
WXYP

Even Parity Check
bit E

0000

0

0001

1

0010

1

0011

0

0100

1

0101

0

0110

0

0111

1

1000

1

1001

0

1010

0

1011

1

1100

0

1101

1

1110

1

1111

0

From the above Truth table, we can observe that the even parity
check bit value is ‘1’, when odd number of ones present in the
received data
...
Exclusive-OR function satisfies this
condition
...


This circuit consists of three Exclusive-OR gates having two
inputs each
...
The Exclusive-OR gate, which is in
second level produces an output of W⊕X⊕Y⊕PW⊕X⊕Y⊕P

Odd Parity Checker
Assume a 3-bit binary input, WXY is transmitted along with odd
parity bit, P
...

It generates an odd parity check bit, E
...
That means,
there is no error in the received data
...

That means, there is an error in the received data
...
The circuit diagram of odd
parity checker is shown in the following figure
...
Since the odd parity is just
opposite to even parity, we can place an inverter at the output
of even parity checker
...


Digital Arithmetic Circuits
In this chapter, let us discuss about the basic arithmetic circuits
like Binary adder and Binary subtractor
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Binary Adder
The most basic arithmetic operation is addition
...
First, let us implement an adder, which
performs the addition of two bits
...
It
produces two outputs sum, S & carry, C
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Inputs

Outputs

A

B

C

S

0

0

0

0

0

1

0

1

1

0

0

1

1

1

1

0

When we do the addition of two bits, the resultant sum can have
the values ranging from 0 to 2 in decimal
...
But, we can’t
represent decimal digit 2 with single bit in binary
...

Let, sum, S is the Least significant bit and carry, C is the Most
significant bit of the resultant sum
...
But, for
last combination of inputs, carry, C is one and sum, S is zero,
since the resultant sum is two
...
The circuit diagram of Half adder is shown
in the following figure
...
Therefore, Halfadder performs the addition of two bits
...
Where, A & B are the two parallel
significant bits and Cin is the carry bit, which is generated from
previous stage
...

The Truth table of Full adder is shown below
...
We can represent
the decimal digits 0 and 1 with single bit in binary
...
So,
we require two bits for representing those two decimal digits in
binary
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It is easy to fill the values of
outputs for all combinations of inputs in the truth table
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If Cin is equal to zero, then
Full adder truth table is same as that of Half adder truth table
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S=A⊕B⊕CinS=A⊕B⊕Cin

cout=AB+(A⊕B)cincout=AB+(A⊕B)cin
The sum, S is equal to one, when odd number of ones present at
the inputs
...
So, we can use either two 2input Ex-OR gates
or one 3-input Ex-OR gate in order to produce sum, S
...
The circuit diagram of Full adder is shown in the following
figure
...
If Cin is
zero, then Full adder becomes Half adder
...

4-bit Binary Adder
The 4-bit binary adder performs the addition of two 4-bit
numbers
...
We can implement 4-bit binary adder in one of the two
following ways
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• Use four Full adders for uniformity
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For the time being, we considered second approach
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Here, the 4 Full adders are cascaded
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The carry output
of one Full adder will be the carry input of subsequent higher
order Full adder
...
So, carry out of last stage Full adder
will be the MSB
...
This binary
adder is also called as ripple carry binarybinary adder because

the carry propagates ripplesripples from one stage to the next
stage
...
We can implement
Binary subtractor in following two methods
...
So, first you can implement Half
subtractor and Full subtractor, similar to Half adder & Full adder
...
So, we will be having two separate
circuits for binary addition and subtraction of two binary
numbers
...
So, internally binary addition operation takes place
but, the output is resultant subtraction
...

Let
the
4bit
binary
numbers, A=A3A2A1A0A=A3A2A1A0 and B=B3B2B1B0B=B3B2B
1B0
...
If the normal bits of binary number
A, complemented bits of binary number B and initial
carry borrowborrow, Cin as one are applied to 4-bit Binary adder,
then it becomes 4-bit Binary subtractor
...


This 4-bit binary subtractor produces an output, which is having
at most 5 bits
...
If Binary number A is less than Binary number
B, then MSB of the output is one
...

In this way, we can implement any higher order binary
subtractor just by cascading the required number of Full adders
with necessary modifications
...
Both, Binary adder and Binary
subtractor contain a set of Full adders, which are cascaded
...

There are two differences in the inputs of Full adders that are
present in Binary adder and Binary subtractor
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The initial carry, C0 = 0 is applied in 4-bit Binary adder,
whereas the initial carry borrowborrow, C0 = 1 is
applied in 4-bit Binary subtractor
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Similarly, it
produces an output, which is complement of first input when
other input is one
...
The other input to all these Ex-OR gates is C0
...

4-bit Binary Adder / Subtractor
The 4-bit binary adder / subtractor produces either the addition
or the subtraction of two 4-bit numbers based on the value of

initial carry or borrow, 𝐶0
...
The operation of 4-bit Binary adder / subtractor is similar to
that of 4-bit Binary adder and 4-bit Binary subtractor
...
The block
diagram of 4-bit binary adder / subtractor is shown in the
following figure
...
So, the 4-bit binary adder / subtractor
produces an output, which is the addition of two binary
numbers A & B
...
So, the 4-bit binary adder / subtractor produces an output,
which is the subtraction of two binary numbers A & B
...




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