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MICROPROCESSOR 8085
Author : NRG

8085 INTRODUCTION
The features of INTEL 8085 are :
•

It is an 8 bit processor
...


•

It has multiplexed address and data bus
...


•

It works on 5 Volt dc power supply
...


•

It provides 74 instructions with 5 different addressing
modes
...

• It generates 8 bit I/O address so it can access 2^8=256
input ports
...
5, RST
6
...
5,INTR
...

• It provides serial lines SID ,SOD
...


8085 PIN DIAGRAM

8085 PIN DESCRIPTION
Some important pins are :
• AD0-AD7: Multiplexed Address and data lines
...

• ALE: Address latch enable is an output signal
...

• S0,S1: These are the status signals used to indicate type
of operation
...

• WR¯:Write is an active low output signal used write data
on memory or an I/O device
...
If it is low, µP will WAIT until it
is high
...
After TRAP, restart occurs and
execution starts from address 0024H
...
5,6
...
5:These are maskable interrupts and
have low priority than TRAP
...

 IO/M¯:This is output pin or signal used to indicate
whether 8085 is working in I/O mode(IO/M¯=1) or

8085 PIN DESCRIPTION
 HOLD&HLDA:HOLD is an input signal
...
In response to HOLD µP generates
HLDA that is HOLD Acknowledge signal
...
When RESET IN¯ is low µp
restarts and starts executing from location 0000H
...

 X1X2 :These are clock input signals and are connected to
external LC,or RC circuit
...

 VCC&VSS:Power supply VCC=+ -5Volt& VSS=-GND
reference
...

•
It is connected to ALU
...

Temporary register: It is not available for user
•
All the arithmetic and logical operations are done in the
temporary register but user can’t access it
...

•
The Flag Register along with Accumulator is called
PSW
or Program Status Word
...

Z:Zero flag is set when result of an operation is 0
...

CY:Carry flag is set when there is carry generated by an
operation
...

Rest are don’t care flip flops
...

2
...
These are loaded only when there is an
operation being performed
...
These are used
for various data manipulations
...

PC:Program Counter
...
Since there are only 6 general purpose registers,
there is a need to reuse them
...

Program Counter: It is 16 bit register used to point the
location from which the next instruction is to be fetched
...

• Upon reset PC contents are set to 0000H and next
instruction is fetched onwards
...
This register takes
the Opcode value only
...

• Timing and control:This is the control section of µP
...


INTERRUPT CONTROL
• It accepts different interrupts like TRAP
INT5
...
5,7
...


SERIAL IO CONTROL
GROUP
•

It is used to accept the serial 1 bit data by
using SID and SOD signals and it can be
performed by using SIM & RIM
instructions
...
(Move data from Rs to Rd)
...
Move the content of register B to C
...


B=10H
...

C=10H
...

Addressing mode: Register
...

Example:
MOV C,M
...
e
...

Suppose the Data at memory pointed By HL pair at C200H
is 10H
...

Flags Affected :No flags affected
...


DATA TRANSFER GROUP
MVI R, Data
...

Example:
MVI B, 30H
...

Addressing mode: Immediate
...
(Load 16 bit data to Register pair
Immediate)
...
(Load Stack pointer with C200H)
...

Flags Affected :No flags affected
...


DATA TRANSFER GROUP
STA address
...

Example:
STA C200H
...

Suppose in Acc the data is 10H
...

Addressing mode: Direct
...
(Load HL pair with data from address)
...
(Move the data from C200 to HL pair)
...

Initially
After execution
H=10H,L=20H
H=20H,L=30H
...

Addressing mode: Direct
...

D=40H,E=70H
...

Flags Affected :No flags affected
...


DATA TRANSFER GROUP
IN 8 bit address (Move the data from address to Acc)
Example: IN 80H
Move the data from 80H port address to Accumulator
...

Initially
After execution
A=20H
...

Addressing mode: Direct
...

Suppose data at Acc is 39H
...
80=10H
...

Flags Affected :No flags affected
...


DATA TRANSFER GROUP
• Example:Write a program to exchange contents of
memory location D000H to D001H
LDA D000H
Load Acc with data from D000
MOV B,A
Move the data to B
LDA D0001H
Load Acc with data from D001
STA 2000H
Store Acc data at D000
MOV A,B
Move B’s data to A
STA 2001H
Store data from D000 to
D0001
RST1
Stop
...

Example:
ADD C
...


Suppose the Data at C register is 10H
...
C= 10H ,A=10H
A=20H,C=10H
...

Addressing mode: Register

ARITHMEIC GROUP
ADD M(ADD H or L Reg content with Acc and result in A )
...
(ADD the content of HL with A)
...

Initially

After execution


...


H=10H,L=20H
...

A=30H
...

Addressing mode: Register Indirect
...

Example:
ADI 30H
...


Initially

After execution

A=20H,
A=50H
...

Addressing mode: Immediate
...

Example:
ADC C
...

Suppose the Data at C register is 10H and carry is 01H
...
C= 10H ,A=10H
A=21H,C=10H
...

Addressing mode: Register

ARITHMETIC GROUP
Example: Write a program to perform 16 bit addition of
1234H& 4321H
...

MVI B,21H
B=21H
MVI A,34H
A=34H
MVI C,43H
C=43H
MVI D,12H
D=12H
ADD B
A=34+21H
MOV L,A
L=55H
MOV A,C
A=43H
ADC D
A=43+12H
MOV H,A
H=55H
RST1
STOP
...

Example:
SUB B
...


Suppose the Data at B register is 10H
...
B= 10H ,A=20H
A=10H,B=10H
...

Addressing mode: Register

ARITHMETIC GROUP
SBB R (Subtract register content from Acc with borrow and
result in A )
...
(Subtract the content of B from A with borrow)
...

Initially

After execution


...

Flags Affected :All flags are modified
...

Example:
SUI 30H
...

Initially

After execution

A=80H,
A=50H
...

Addressing mode: Immediate

ARITHMETIC GROUP
Example: Subtract data of C800 H from C200H
...

LDA C800H
MOV B,A
LDA C200H
SUB B
STA 2C00H
RST1

ARITHMETIC GROUP
DAD Rp (Add specified register pair with HL pair)
Example:DAD D
...

Initially
After execution
H=20H ,L=40H
H=50H ,L=50H
D=30H, E=10H
D=30H, E=10H
Flags Affected :Only carry flag is modified
...


ARITHMETIC GROUP
DAA (Decimal adjust accumulator)
Example:
MVI A,12H
ADI 39H
DAA
...
If
lower nibble is greater than 9 ,6 is added while if upper
nibble is greater than 9,6 is added to it to get BCD
result
...

Flags Affected :All flags are modified
...

Example:
INR C
...


Suppose the Data at C register is 10H
...

Flags Affected :All flags are modified except carry flag
...


ARITHMETIC GROUP
DCR R (Decrement register content by 1 )
...
(Decrement the content of C by 1)
...

Initially

After execution

C= 10H
C=0FH
...

Addressing mode: Register
...

Example:
INX SP (Increment the content of Stack pointer pair by 1)
...
(Increment the content of BC pair by 1)
...


SP=C200H
SP=C201H
...

Addressing mode: Register
...

Example:
ANA C (AND the content of C with A)
...

Initially

After execution

C= 10H ,A=10H
A=10H,C=10H
...

Addressing mode:Register
...

Example:
ANI 10H (AND 10H with A)
...

Addressing mode: Immediate
...

Example:
ORA C (OR the content of C with A)
...

Initially

After execution

C= 17H ,A=10H
A=17H,C=17H
...

Addressing mode:Register
...

Example:
ORI 10H (OR 10H with A)
...

Addressing mode: Immediate
...

Example:
XRA C (XOR the content of C with A)
...

Initially

After execution

C= 17H ,A=10H
A=07H,C=17H
...

Addressing mode:Register
...

Example:
CMP C (Compare the content of C with A)
...

Initially

After execution

C= 10H ,A=17H
A=17H,C=17H
...

Addressing mode:Register
...

Example:
CPI 10H (Compare the content of C with A)
...

Flags Affected :S=0,Z=0,P=0, Cy=reset,AC=reset
...


LOGICAL GROUP
RLC (Rotate accumulator left )
...


RLC
Initially

(Rotate accumulator left)
...

Flags Affected :Only carry flag is affected
...


LOGICAL GROUP
RAL (Rotate accumulator left with carry )
...


RAL
Initially

(Rotate accumulator left with carry)
...

Flags Affected :Only carry flag is affected
...


LOGICAL GROUP
RRC (Rotate accumulator right )
...


RRC
Initially

(Rotate accumulator right)
...

Flags Affected :Only carry flag is affected
...


LOGICAL GROUP
Write a program to reset last 4 bits of the number 32H
Store result at C200H
...

C200=30H
RST1
Stop

BRANCH GROUP
JMP address(Unconditional jump to address)
Example:
JMP C200H
...

Flags Affected :No Flags are affected
...


CALL address(Unconditional CALL
from address)
Example:
CALL C200H
...

Flags Affected :No Flags are affected
...

• JC (Jump if Carry flag is set)
• JNC (Jump if Carry flag is reset)
• JZ (Jump if zero flag set)
• JNZ (Jump if zero flag is reset)
• JPE (Jump if parity flag is set)
• JPO (Jump if parity odd or P flag is reset )
• JP (Jump if sign flag reset )
• JM (Jump if sign flag is set or minus)

BRANCH GROUP
Conditional Call Instructions
...

Flags Affected :No Flags are affected
...


BRANCH GROUP
RST (Restart instruction)
Example:
MOV A,C
RST 1
...

Flags Affected :No Flags are affected
...


BRANCH GROUP
The addresses of the respective RST commands are:

Instruction
RST 0
RST 1
RST 2
RST 3
RST 4
RST 5
RST 6

Address
0000H
0008H
0010H
0018H
0020H
0028H
0030H

STACK AND MACHINE
CONTROL
PUSH Rp
...

Example:LXI SP FFFFH
...
(Move the content of HL pair on Stack)
...

SP=FFFF H
FFFD=30H,FFFE=20H
Flags Affected :No flags affected
...


STACK AND MACHINE
CONTROL
POP Rp
...

Example:POP D(POP the content of DE pair from Stack)
...

FFFD=80H,FFFE=10H
Flags Affected :No flags affected
...

Example:XTHL(Exchange top with HL pair)
...

Initially
After execution
H=20H,L=30H
H=10H,L=80H
...

Addressing mode: Register indirect
...

Example:
MVI A,20H
...

Number of bytes:
Either 2 or 3 bytes long
...

2nd byte 8 bit data
...


ADDRESSING MODES OF
8085
Register addressing:
Data is transferred from one register to other
...

Number of bytes:
Only 1 byte long
...


ADDRESSING MODES OF
8085
Direct addressing:
• Data is transferred from direct address to other register
or vice-versa
...
Transfer contents from C200H to Acc
...

1st byte is opcode
...

3rd byte higher address
...

Example:
MOV A, M: Move contents from address pointed by M to
Acc
...

1st byte is opcode
...

3rd byte higher address
...
The data is specified
in Opcode itself
...

No
...


PROGRAM
• Write a program to transfer a block of data from C550H to
C55FH
...

LXI H ,C550H
LXI B ,C570H
MVI D,0FH
UP MOV A,M
STAX B
INX H
INX B
DCR D
JNZ UP
RST1

PROGRAM
•
•

Find out errors in the following :
MVI B,D =Immediate addressing doesn’t have register
as operand
...

•
INX L=Increment operator always acts on the higher
memory address in register pair
...

•
JP 80H = Conditional jump instructions doesn’t have any
immediate operand
...

If Flag contents are AB H, what is flag status
If flag contains AB H then it’s values from D7 to D0 are
10101011
...


PROGRAM
11
...

LXI H, C200H
PCHL
Load PC with HL content
Thus PC= L,PC +1=H
...

NOP (No operation)
• This instruction has no effect on code only used to cause
delay
...
Data is stored from
locations C200
...

LXI H,C200 H
MVI C, 0A H
UP MVI A,00 H
MOV B,M
ADD B
INX H
DCR C
JNZ UP
STA C300H
RST1
...

2
...

4
...


The µP operates with reference to clock signal
...

Each clock cycle is called a T state and a collection of
several T states gives a machine cycle
...

Memory read
...

I/Op-read
...


TIMING AND STATE DIAGRAM
Op-code Fetch:It basically requires 4 T states from T1-T4
•
The ALE pin goes high at first T state always
...

•
A8-A15 store the higher byte of the Program Counter
while IO/M¯ will be low since it is memory related
operation
...

•
WR¯ will be at HIGH level since no write operation is
done
...


TIMING AND STATE DIAGRAM
Op-code fetch cycle :

TIMING AND STATE DIAGRAM
Memory Read Cycle: It basically requires 3T states from T1T3
...

•
AD0-AD7 are used to fetch data from memory and store
the lower byte of address
...

•
RD¯ will only be low at the data fetching time
...

•
S0=0,S1=1 for Memory read cycle
...

•
The ALE pin goes high at first T state always
...

•
A8-A15 store the higher byte of the address while IO/M¯
will be low since it is memory related operation
...

•
WR¯ will be at LOW level only when data fetching is
done
...


SUBROUTINE
Calculation of Delay using 8 bit counter:
• Consider following example:
MVI C, count(8 bit) H
7 T states
UP DCR C
4 T states
JNZ UP
10/7 T
RET
10T
• Here loop UP is executed (N-1) times
...

• Where M= no
...

N=no
...


SUBROUTINE
•
•
•
•
•

Here value of M= 17, N= 14
...

Thus Td max =17+[255x14]-3= 3584 T states
...
5 µsec delay for a T state, we get
Td max=0
...
792 m sec
...


•

Generally EPROMS are used as program memory and RAM as
data memory
...


•

Memory interfacing includes 3 steps :

1
...

2
...

3
...


8085 Memory Interfacing
• Example: Interface 2Kbytes of Memory to 8085 with
starting address 8000H
...
So we use A0-A10
...

• MEMR¯ and MEMW¯are given to RD¯and WR¯pins of
Memory chip
...

• In this way memory interfacing can be achieved
...

•It is called absolute decoding
...
So
we ignore them
...

•This type of decoding is called linear decoding or partial
decoding
...


8255 PIN DIAGRAM
PA0-PA7
PB0-PB7
PC0-PC7
D0-D7
RESET
RD¯
WR ¯
A0-A1
CS ¯
Vcc , Gnd

I/O
I/O
I/O
I/O
I
I
I
I
I
I

Port A Pins
Port B Pins
Port C Pins
Data Pins
Reset pin
Read input
Write input
Address pins
Chip select
+5volt supply

8255 BLOCK DIAGRAM

8255 BLOCK DIAGRAM
 Data Bus Buffer: It is an 8 bit data buffer used to interface
8255 with 8085
...

 Read/write control logic:It consists of inputs
RD¯,WR¯,A0,A1,CS¯
...

 A0,A1 are Port select signals used to select the particular
port
...

 It is controlled by the output of the 3:8 decoder used to
decode the address lines of 8085
...


A1

A0

Selected port

0
0
1
1

0
1
0
1

Port A
Port B
Port C

Control Register

8255 BLOCK DIAGRAM






1
...


Group A and Group B Control:
Group A control consists of Port A and Port C
upper
...

Each group is controlled through software
...

The bit pattern consists of :
Information about which group is operated
...


8255 BLOCK DIAGRAM
• PORT A,B:These are bi-directional 8 bit ports each and
are used to interface 8255 with CPU or peripherals
...

• PORT C: This is a bi-directional 8 bit port controlled
partially by Group A control and partially by Group B
control
...

• It is used mainly for control signals and interfacing with
peripherals
...

• Allows single bit manipulation for control applications

INTERFACING 8085 & 8255
• Here 8255 is interfaced in Memory Mapped I/O mode
...

A15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

Port

1

0

0

0

0

X

X

X

X

X

X

X

X

X

0

0

A

1

0

0

0

0

X

X

X

X

X

X

X

X

X

0

1

B

1

0

0

0

0

X

X

X

X

X

X

X

X

X

1

0

C

1

0

0

0

0

X

X

X

X

X

X

X

X

X

1

1

CW

INTERFACING 8085 & 8255
• Thus we get addresses ,considering don’t cares to be zero
as
Port A =8000H
Port B =8001H
Port C =8002H
CWR =8003H
• Then,we give A11,A12,A13 pins to A,B,C inputs of Decoder to
enable 8255 or Chip Select
...

• Output from Latch is given as A0,A1 pins to 8255 while D0D7 are given as data inputs
...
Add FF H
...

MVI A,82H Initialize 8255
...

OUT Result to port A
...

STOP
...

• Only one party can speak
...

System A
System B

Transmi
tter

unidirectional

Receiver

SERIAL COMMUNICATION
System A

Transmi
tter/Rec
eiver

System B
OR

Receiver
/Transm
itter

Half Duplex: It is a two way communication between two ports
provided that only party can communicate at a time
...

•The first party now acts as a receiver
...
itter
...


• Thus here efficient communication can be established
...


Synchronous

It transfers one character at a 1
...


It transfers group of
characters at a time
...
Used for transfer data rates
<20KBPS

2
...
Start and stop bit for each
character which forms a frame
...
No start and stop bit for
each character
...
Two Clocks are used for Tx
and Rx

4
...


INTERRUPTS IN 8085
• Interrupt is a process where an external device can get
the attention of the microprocessor
...

• Classification of Interrupts

Interrupts can be classified into two types:
• Maskable Interrupts (Can be delayed or Rejected)
• Non-Maskable Interrupts (Can not be delayed or
Rejected)

INTERRUPTS IN 8085
Interrupts can also be classified into:
• Vectored (the address of the service routine is
hard-wired)
• Non-vectored (the address of the service routine
needs to be supplied externally by the device)
• An interrupt is considered to be an emergency signal
that may be serviced
...


INTERRUPTS IN 8085
• The 8085 has 5 interrupt inputs
...

The INTR input is the only non-vectored interrupt
...

RST 5
...
5, RST 7
...

• RST 5
...
5, and RST 7
...


TRAP is the only non-mask-able interrupt in the 8085
• TRAP is also automatically vectored
...
Each of these would send the execution to a
predetermined hard-wired memory location:
Restart
Instruction

Equivalent to

RST0

CALL 0000H

RST1

CALL 0008H

RST2

CALL 0010H

RST3

CALL 0018H

RST4

CALL 0020H

RST5

CALL 0028H

RST6

CALL 0030H

RST7

CALL 0038H

INTERRUPT PRIORITY
Interrupt name

Mask-able

Vectored

TRAP

No

Yes

RST 7
...
5

Yes

Yes

RST 5
...
5
MSE
M7
...
5
M5
...
5 Mask
RST6
...
5 Mask

}

0 - Available
1 - Masked

Mask Set Enable
0 - Ignore bits 0-2
1 - Set the masks according
to bits 0-2

Force RST7
...

•It can also mask a maskable interrupt
...
5 is enabled, RST6
...
5 is enabled
...
5
- Disable 6
...
5
- Allow setting the masks
- Don’t reset the flip flop
- Bit 5 is not used
- Don’t use serial data
- Serial data is ignored
EI
MVI A, 0A
SIM

bit 0 = 0
bit 1 = 1
bit 2 = 0
bit 3 = 1
bit 4 = 0
bit 5 = 0
bit 6 = 0
bit 7 = 0

SDO
SDE
XXX
R7
...
5
M6
...
5

• First, determine the contents of the accumulator
...
5, and 5
...
5
; Apply the settings RST masks

RIM INSTRUCTION
6

5 4

3

2

1

0

SDI
P7
...
5
P5
...
5
M6
...
5

7

Serial Data In
RST5
...
5 Interrupt Pending
RST7
...
5 Mask
RST6
...
5 Mask

}

0 - Available
1 - Masked

Interrupt Enable
Value of the Interrupt Enable
Flip Flop

•Since the 8085 has five interrupt lines, interrupts may occur during an
ISR and remain pending
...


8253 PIT

8253 Features
•
•
•
•
•

Three independent 16 bit counters
...

Counting facility in Both BCD and Binary modes
...

Can be used as a clock generator
...


CONTROL WORD
BCD =0 Binary counter
M2

M1

M0

BCD =1 BCD counter

0

0

0

Mode 0

0

0

1

Mode 1

X

1

0

Mode 2

X

1

1

Mode 3

1

0

0

Mode 4

1

0

1

Mode 5

8253 SQUARE WAVE
• Example: Use 8253 as a square wave generator with
1ms period if the input frequency is 1MHz
...

• I/P frequency is 1MHz
...

• Count value = Required period /Input period = 1ms/1
µsec
• =1000(Decimal)
...


8253 SQUARE WAVE
• Program:
MVI A,37H
Initialize counter 0 mode 3
OUT 13H
16 bit count BCD
MVI A,00H
Load LSB count to counter 0
OUT 10H
MVI A,10H
Load MSB count to counter 0
OUT 10H
...


DMA

8257 DMA
• It is a 4 Channel DMA containing 4 individual I/P ,O/P
Channels
...

• The maximum frequency is 3 MHz
...
DMA read
2
...

3
...

• The external device can terminate DMA Operation

OPERRATING MODES OF
8257
1
...

•
Priority is shifted from one channel to other
...
Fixed priority mode: Each channel has a fixed priority
and if higher priority channels are busy then smaller
priority will get to serve
...
Extended write mode: This mode is used to interface
slower devices to the system
...
TC stop mode:If this bit is set the channel whose
terminal count is reached is disabled
...
Auto reload mode: If this bit is set data is transferred
by channel 2 only
...




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