Search for notes by fellow students, in your own course and all over the country.

Browse our notes for titles which look like what you need, you can preview any of the notes via a sample of the contents. After you're happy these are the notes you're after simply pop them into your shopping cart.

My Basket

You have nothing in your shopping cart yet.

Title: Digital Electronics Latches
Description: easy and organised notes about latches and how to implement them and their applications

Document Preview

Extracts from the notes are below, to see the PDF you'll receive please use the links above


EMT 125/3
DIGITAL ELECTRONIC PRINCIPLES

INTRODUCTION TO
SEQUENTIAL LOGIC CIRCUIT

SITI ZARINA BINTI MD NAZIRI | SCHOOL OF MICROELECTRONIC ENGINEERING | UniMAP

Sequential Logic Circuit
 Describe and explain Latches, Gated Latches
and Edge triggered flip flops characteristic
...


 Explain and demonstrate the applications of
flip flops
...


 Latches are bistable devices whose state normally
depend on asynchronous input
...


Introduction (cont
...


 Flip-Flop:
The output of a flip-flop also depends on current inputs and its
previous output but the change of state occurs at specific times
determined by a clock input
...


Latches
 A type of temporary storage device that has two stable (bi-stable)
states
...

 S-R latch, Gated/Enabled S-R latch and Gated D latch
...
, active high input SR latch – form with 2cross-coupled NOR gates
...
, active low input SR latch – form with 2cross-coupled NAND
gates
...


 Output of latch always complement of each others:
-when Q is high, Q’ is low
...


Latches

 Latches:
 S-R Latch(active high input & active low input)
 Gated S-R Latch
 Gated D Latch

S-R Latch (Set-Reset Latch)

Active HIGH S-R Latch

Logic Diagram
S

R Q

Q

0
0

0 NC
1 0

NC
1

No change
Reset state

1

0 1

0

Set state

1

1 0

0

Undefined

Function table

Two Logic Symbols

Active LOW S-R Latch

Logic Diagram

S

R Q

Q

0
0

0 NC
1 1

NC
0

No change
Set State

1

0 0

1

Reset state

1

1 1

1

Undefined

Function table

Two Logic Symbols

S-R Latch (cont…)
 Example 1:
If S’ and R’ waveform is applied to the input of latch in
given figures, determine the waveform that will be observed
on the Q output
...


S-R Latch (cont…)
 Answer 1:

Gated S-R Latch

Logic Diagram

EN

S

R

Q

Q

0
1

X
0

X
0

Q
Q

Q’
Q’

No change
No change

1
1

0
1

1
0

0
1

1
0

Reset state
Set state

1

1

1

1

1

Undefined

Function table

EN

EN

Two Logic Symbols

Gated S-R Latch (cont…)
 Example 2:
Determine the Q output waveform if the inputs shown are
applied to Gated S-R Latch that is initially RESET
...


Gated D Latch (cont…)
 Answer:


Title: Digital Electronics Latches
Description: easy and organised notes about latches and how to implement them and their applications