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Hardware Communication Protocols
(USB3, I2C, SPI)
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com
mido_ads201011@yahoo
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elmashed@Hotmail
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I
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Each message has an exact meaning
intended to elicit a response from a range of possible
responses pre-determined for that particular situation
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A
protocol can therefore be implemented as hardware, software,
or both
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To reach agreement, a protocol may be
developed into a technical standard
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This paper takes a look at the I2C, SPI and USB3
communication protocol with computers and other devices
II
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Standard I2C devices operate up to 100Kbps, while fastmode devices operate at up to 400Kbps
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2
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4Mbps
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Fig
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I2C POWERFUL FEATURES
The I2C bus has a lot of features that makes him a powerful
communicating tool in IC circuits
1- MASTER–SLAVE HIERARCHY
I2c device can be a master or slave or switch between
master and slave according to application requires
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(Figure 1)
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(Figure 2)
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microprocessor/microcontroller peripheral chips that enables
the controllers and peripheral devices to communicate each
other
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The SPI bus, which operates at full duplex (means, signals
carrying data can go in both directions simultaneously), is a
synchronous type data link setup with a Master / Slave
interface and can support up to 1 mega baud or 10Mbps of
speed
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But the multi-master bus is rarely used and
look awkward, and are usually limited to a single slave
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Data and control lines of the SPI and the basic connection:

Fig
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1-

B
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3- Then it sends the eight bit which is read or write bite
(‘0’ slave read, ‘1’ slave transmit)
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5- Then the transmitter (slave or master, as indicated by
the bit) transmits a byte of data starting with the
MSB
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7- This 9-bit pattern is repeated if more bytes need to be
transmitted
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9- In a read transaction (slave transmitting), the master
does not acknowledge the final byte it receives
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The
master then issues the stop condition
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Master In Slave Out (MISO) - Slaves generate MISO
signals and recipient is the Master
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Slave Select (SS) from master to Chip Select (CS) of
slave - SS signal is generated by Master to select
individual slave/peripheral devices
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Fig
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3 Basic I2C message

III
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Micro wire of National
Semiconductor is same as SPI
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The Serial Peripheral Interface or SPI-bus is a simple 4wire serial communications interface used by many

B
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2- The master then select the desired slave for
communication by pulling the chip select (SS) line of
that particular slave-peripheral to "low" state
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4- Other inactivated slaves will refuse the master clock
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Data transfer is organized by using Shift register with some
given word size such as 8- bits (remember, it’s not limited to
8-bits), in both master and slave
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While master shifts register value out through MOSI line, the
slave shifts data in to its shift register
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Different types of configuration
1- Daisy-chained slave configuration:
In cascaded slave configuration, all the clock lines
(SCLK) are connected together
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The data
flows out the microcontroller, through each peripheral
in turn, and back to the microcontroller
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So the cascaded slave-devices are evidently looked at
as one larger device and receive therefore the same
chip select signal
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(Figure 5)

Fig
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In this
independent or parallel slave configuration, all the
clock lines (SCLK) are connected together, All the
MISO data lines are connected together, All the MOSI
data lines are connected together, but the Chip Select
(CS) pin from each peripheral must be connected to a
separate Slave Select (SS) pin on the mastermicrocontroller
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Fig
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USB 3
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0 specifications were released on November
2008
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0, it has an increased data transfer rate
(up to 5Gbps), decreased power consumption, increased
power output and most importantly, USB 3
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0
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0 consists of a new
higher speed bus known as Super Speed that is in parallel with
the USB 2
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A
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2- USB hub
It connects the USB host with other USB devices, it
also allows multiple USB devices to attach to a single
USB port on a USB host
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At any one time, only a maximum of
5 external hubs can be connected in series and up to a
total of 127 peripherals and hubs including the root
hub
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Despite having multiple devices connected at one time,
only one device at a time can communicate with a
host controller
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A function is typically implemented as a
separate peripheral device that plugs into a port on a
hub using a cable
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USB Data Communication:
In USB data communication, the USB encodes the data by
using the Non- Return-to-Zero Inverted (NRZI)
transmission scheme
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In
addition, in order to ensure a minimum density of signal
transitions that remains in the bit stream, an additional “0”
bit is injected onto the data bus after the occurrence of 6
consecutive “1” bits
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All this is done to ensure the
presence of sufficient signal transitions for clock recovery
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Communication using USB port
1- Detecting a device has connected
The host detects a device has connected to one of
USB ports and starts to identify the connected device,
The device communicates with the host using the
default address of 00h, The host will receive first
packet of 8 bytes of device which will describe the
device class and its function

2- Data transfer
Most USB transactions consist of three packets:
 A token packet indicates the type and direction of the
transaction, the device address, and an endpoint
number
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

The receiving device responds with a handshake
packet to indicate if the transfer was successful
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A single pipe supports only (and exactly) one
transfer type for any given device configuration
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The host "polls" the input device periodically, for example
every 10 ms, which is quick enough for reflecting keyboard
inputs to the screen without irritating the user
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e
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Isochronous transfer: The most important requirement for
"Isochronous transfers" is to transfer a constant amount of
data over each time period
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Note that speakers and
other audio/video devices also require the use of Control
transfers
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They are essential to set up a USB device with all
enumeration functions being performed using control transfers
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The packet length of
control transfers in low speed devices must be 8 bytes, high
speed devices allow a packet size of 8, 16, 32 or 64 bytes and
full speed devices must have a packet size of 64 bytes
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The Setup
Stage is where the request is sent
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The setup token is sent first which contains the
address and endpoint number
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The last packet is a
handshake used for acknowledging successful receipt or to
indicate an error
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Functions cannot issue a STALL or NAK packet in
response to a setup packet
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Transaction transfer
In all 4 different transfers of Control, Bulk,
Interrupt and Isochronous, these 4 transfers consist of 3
types of packets namely the
1- Token packet
It consists of the following elements: sync
sequence, Package identifier, device address,
endpoint number and 5-bit Cyclic Redundancy
Check (CRC)
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2- Data transfer packet
It consists of the following elements: sync
sequence, package identifier, data and 16-bit Cyclic
Redundancy Check (CRC)
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3- Handshake
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It consists of the following elements: sync
sequence and Package identifier
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7 NRZI transmission scheme

E
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Microcontrollers can communicate with I2C
devices even if it has no special I2C interface
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The SPI bus is a simple 4 wired bus
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It can be connected to many devices (slaves),
but as the number of slaves increases the number of wires
will increase which will increase the area of the circuit, so
this is an undesired property
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S
REFERENCES
[1] Bollam Eswari, N
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Preethi, S
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Sreejeesh
“Implementation of I2C Master Bus Controller on FPGA”
IEEE’s paper, April 2013
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ieee
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jsp?tp&arnu
mber=6577229&sortType%3Ddesc_p_Publication_Year
%26searchField%3DSearch_All%26queryText%3Di2c
[2] Peter Corcoran “Two Wires and 30 Years: A tribute and
introductory tutorial to the I²C two-wire bus” IEEE’s
paper, July 2013
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ieee
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jsp?tp&arnu
mber=6556004&sortType%3Ddesc_p_Publication_Year
%26searchField%3DSearch_All%26queryText%3Di2c+
bus
[3] Shumit Saha, Md
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Available:
http://ieeexplore
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org/xpl/articleDetails
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0 Bus”
Available:
http://en
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org/wiki/USB_3
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wikipedia
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wikipedia

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