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HNC Electrical and Electronic Engineering
Year One - 2013/14
Module: Digital & Analogue Devices

Operational
Amplifiers

Keith A
...
Hudson

2

Digital & Analogue Devices
05 March, 2014

Contents
1

Assumptions
...
7
2
...
2

Circuit Simulation Using Proteus
...
3
3

Requirements
...
15

Integration Circuit (Task 1b)
...
1
3
...
18

3
...
17

Actual Circuit
...
23
4
...
23

4
...
25

4
...
34

5

Conclusions
...
37

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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8
Figure 2: Testing i/p A
...
10
Figure 4: Testing i/p C
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3 V
...
3 V
...
2 V
...
15
Figure 9: Multi-meters showing the actual output from each Op Amp
...
17
Figure 11: The simulated Integrator Circuit
...
19
Figure 13: Input / Output ranges
...
4s
...
21
Figure 16: Power supply
...
21
Figure 18: Setting up the PSU and initial oscilloscope output
...
22
Figure 20: Input 0000, Output 0
...
26
Figure 22: Input 0010, Output 2
...
27
Figure 24: Input 0100, Output 4
...
28
Figure 26: Input 0110, Output 6
...
29
Figure 28: Input 1000, Output 8
...
30
Figure 30: Input 1010, Output 10
...
31
HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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31
Figure 33: Input 1101, Output 13
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32
Figure 35: Input 1111, Output 15
...
34
Figure 37: Duel PSUs
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35

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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7
Table 2: Values for A and B and the expected Output
...
13
Table 4: Same values for A and B and a different C and the expected Output
...
17
Table 6: Input vs
...
18
Table 7: Weighting associated with each bit
...
23
Table 9: Prime factors
...
24
Table 11: Ideal vs
...
36

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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This may
be as much as ±10% for a resistor with a silver band
...
Resistors with smaller tolerances (i
...
more accurate) are available but they are more expensive
...

These experiments assume the use of ideal Op Amps
...

2
...

4
...

6
...


Voltage gain is infinite
...

Input resistance is infinite
...

Input voltage offset is zero
...

Output can swing instantly to the correct value
...
The model used
is a HY3005D-2
...
01%
≤0
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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1 Requirements
A circuit is required with the following characteristics:






It should have three input voltages: Input A, Input B and Input C
The value of Input A should be multiplied by 0
...
e
...
2, i
...
divided by 5 (o/p B)
The value of Input C should be multiplied by 0
...
e
...
Therefore, if we know

what output to input ratio is required we can calculate the ratio of 𝑅 𝑌 to 𝑅 𝑋 (ignoring the change of sign):
Table 1: Amplification values for each input value

Input A
The ratio is 0
...
2 or

Input C
1
5

𝑉 𝑜𝑢𝑡
𝑅
= 𝑋
𝑉 𝑖𝑛
𝑅𝑌
1
𝑅𝑋
= 𝑅
5
𝑌

The ratio is 0
...
e
...
The output from the op-amp will be negative (i
...

inverted), so we need to pass the result through a second inverting op-amp to invert it again, thus
correcting the sign
...
If we multiply
both sides by -1 we get − 𝑂𝑢𝑡𝑝𝑢𝑡 = −(𝐴 + 𝐵) + 𝐶
...
So if
we add C to that output, and invert the result we are left with the required output result
...
Hudson

8

Digital & Analogue Devices
05 March, 2014

2
...


Figure 1: Adder / Subtractor circuit

For each input a variable resistor was connected to a five volt source to allow an input value to be selected
in the range 0-5V
...
Input A was then set to 2V to ensure the
amplification was correct
...
40V
...
This was the repeated for Input B
...
20V, See Figure 3
...
00V, see Figure 4
...
Hudson

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Digital & Analogue Devices
05 March, 2014

Figure 2: Testing i/p A

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Hudson

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Digital & Analogue Devices
05 March, 2014

Figure 4: Testing i/p C

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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1 * i/p A + 0
...

Table 2: Values for A and B and the expected Output

𝐴 = 5
...
1 = 5
...
1 = 0
...
0 𝑉
𝐵 ∗ 0
...
0 ∗ 0
...
8 𝑉

𝑂𝑢𝑝𝑡𝑢𝑡 = 0
...
8 = 1
...
3 V

As Figure 5 shows, the actual Output matches expected Output
...
Hudson

Digital & Analogue Devices
05 March, 2014

13

Table 3: Values for A, B and C and the expected Output

𝐴 = 5
...
1 = 5
...
1
𝐴 = 0
...
0 𝑉
𝐵 ∗ 0
...
0 ∗ 0
...
8 𝑉

𝐶 = 2
...
5 = 2
...
5
𝐶 = 1
...
5 + 0
...
0
𝑂𝑢𝑝𝑡𝑢𝑡 = 0
...
3 V

As Figure 6Figure 5 shows, the actual Output matches expected Output
...
Hudson

Digital & Analogue Devices
05 March, 2014

14

Keeping A and B unchanged; a larger value of C is be used to ensure a negative result is correctly
calculated
...
0 𝑉
𝐴 ∗ 0
...
0 ∗ 0
...
5 𝑉

𝐵 = 4
...
2 = 4
...
2
𝐵 = 0
...
0 𝑉
𝐶 ∗ 0
...
0 ∗ 0
...
5 𝑉

𝑂𝑢𝑝𝑡𝑢𝑡 = 0
...
8 − 2
...
2 𝑉

Figure 7: A = 5 V, B = 4 V, C = 5 V, Output = -1
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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3 Actual Circuit
The actual circuit was created using power supplies (PSU), resistors and boards each containing a 741 Op
Amp
...
The resultant circuit can be seen in Figure 8
...

The PSU on the right, provide power to the rails of the 741 on the right
...

The PSU on the left provides 5V for inputs A, B and C
...


The Op Amp on the left- is the adder, with inputs:
𝐴 = 5
...
1 = 0
...
5 + 1
...
5

𝐵 = 5
...
2 = 1
...
5

The output from the Op Amp on the left will be −1
...

The Op Amp on the right- is the subtractor, with inputs:
−(𝐴 + 𝐵) = −1
...
0 𝑉 ∗ 0
...
5 𝑉

𝐴 + 𝐵 − 𝐶 = −(−(𝐴 + 𝐵) + 𝐶)
−(−1
...
5) = −1
...
0 𝑉 (minus because 1
...
5 = −1
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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The output from the ‘subtractor’ Op Amp is 1
...
The
respective values are not exactly 1
...
0 for a number of reasons:




The input voltage to the Op Amps was not exactly 5
...
(Actually 5
...
)
The resistance of the wires may have affected the input ratios slightly
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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1 Requirements
A circuit is required, such that the output voltage, 𝑉𝑜 = 0
...


Figure 10: Op Amp Integrator circuit

The above circuit (see Figure 10) is an example of an Op Amp Integrator circuit
...
2 ∫ 𝑉𝑖 𝑑𝑡, it is very similar to the output from the above (Figure
10) circuit
...
2
...
2

0
...
001 = 1 ∗ 10−3 𝐹 𝑜𝑟 1𝑚𝐹

Year One: 2013/14

Keith A
...
2 Circuit Simulation Using Proteus
Using the values from Table 5, the resultant circuit can be seen in Figure 11:

Figure 11: The simulated Integrator Circuit

A signal generator was used to produce a square wave (Peak-to-peak: 5V, max +2
...
5V) input to
the circuit
...
As Figure 12 shows the output
is a triangular wave
...

Figure 13 shows the input and the output values
...
It then increases at a constant rate back to 0V
...
output voltage

Time (s)
i/p (V)
o/p (mV)

0
+2
...
5
+2
...
5
-2
...
0
-2
...
When the input is positive the output is negative and when the
input is negative the output is positive
...
Hudson

19

Digital & Analogue Devices
05 March, 2014

Figure 12: The input and output wave forms

Figure 13: Input / Output ranges

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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5 seconds, the input
voltage is constant
1
So 𝑉𝑜 = − 𝐶𝑅 ∫ 𝑉𝑖 𝑑𝑡
1

becomes 𝑉𝑜 = − 𝐶𝑅 𝑉𝑖 𝑡
At time, t=0
...
2
𝐶𝑅
𝑉𝑜 = −0
...
5 ∗ 0
...
2𝑉 = −200𝑚𝑉
On the simulator we get −197𝑚𝑉, almost the same
value
...
4s

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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3 Actual Circuit

Figure 16: Power supply
Figure 15: integrator circuit on breadboard

Figure 17: Function generator producing the square wave input for the integrator

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Figure 19: Oscilloscope output

Wiring up circuits using breadboard is extremely fiddly and mistakes are easy to make and difficult to
locate
...
When using
Proteus all the components are ‘working’
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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1 Requirements
This circuit requires four digital inputs
...
For simplicity an input voltage of 1V will
be used for on, and 0V will be used for off
...

Each of the four input bits will be weighted differently:
𝑂𝑢𝑡𝑝𝑢𝑡 = (𝐼𝑛𝑝𝑢𝑡 1) ∗ 1 + (𝐼𝑛𝑝𝑢𝑡 2) ∗ 2 + (𝐼𝑛𝑝𝑢𝑡 3) ∗ 4 + (𝐼𝑛𝑝𝑢𝑡 4) ∗ 8
Table 7: Weighting associated with each bit

Bit
1
2
3
4

Weight
1
2
4
8

Binary
0001
0010
0100
1000

MSB

Input bits
1000
1001
1010
1011
1100
1101
1110
1111

Output Value
8
9
10
11
12
13
14
15

LSB

LSB: least significant bit, MSB: most significant bit
...

Add two more inputs to the adder part of the circuit
...

The second op amp (was the subtractor) will now be used to correct the “sign” so that the final
output is positive
...
Hudson

Digital & Analogue Devices
05 March, 2014

24

The lowest common multiple (LCM) of 1, 2, 4 and 8 is 8 (See Table 9)
...
In this
case it is list 8, which has 2*2*2
...

(BBC, 2014)

The feedback resistor (𝑅5 ) on the adder op amp should be a factor of 8
...

Table 10: Amplification values for each input bit

Bit 1

Bit 2

Bit 3

Bit 4

The multiplier is 1

The multiplier is 2

The multiplier is 4

The multiplier is 8

𝑉 𝑜𝑢𝑡
𝑅5
= 𝑅1
𝑉 𝑖𝑛
1
𝑅5
=
1
𝑅1
𝑅5
𝑅1 = 1
8
𝑅1 = 1

𝑉 𝑜𝑢𝑡
𝑅5
= 𝑅2
𝑉 𝑖𝑛
2
𝑅5
=
1
𝑅2
𝑅5
𝑅2 = 2
8
𝑅2 = 2

𝑉 𝑜𝑢𝑡
𝑅5
= 𝑅3
𝑉 𝑖𝑛
4
𝑅5
= 𝑅3
1
𝑅5
𝑅3 = 4
8
𝑅3 = 4

𝑅1 = 8𝑘𝛺

𝑅2 = 4𝑘𝛺

HNC Electrical and Electronic Engineering

𝑅3 = 2𝑘𝛺

𝑉 𝑜𝑢𝑡
𝑅5
= 𝑅4
𝑉 𝑖𝑛
8
𝑅5
=
1
𝑅4
𝑅5
𝑅4 = 8
8
𝑅4 =
8

𝑅4 = 1𝑘𝛺

Year One: 2013/14

Keith A
...
2 Circuit Simulation Using Proteus
The final circuit is shown in Figure 20
...
When a switch
is up the input is off, i
...
0V
...
e
...

Figure 20 to Figure 35 show all possible input combinations and the corresponding outputs
...
Hudson

26

Digital & Analogue Devices
05 March, 2014

Figure 21: Input 0001, Output 1

Figure 22: Input 0010, Output 2

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Hudson

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Digital & Analogue Devices
05 March, 2014

Figure 25: Input 0101, Output 5

Figure 26: Input 0110, Output 6

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Hudson

30

Digital & Analogue Devices
05 March, 2014

Figure 29: Input 1001, Output 9

Figure 30: Input 1010, Output 10

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Hudson

32

Digital & Analogue Devices
05 March, 2014

Figure 33: Input 1101, Output 13

Figure 34: Input 1110, Output 14

HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Hudson

34

Digital & Analogue Devices
05 March, 2014

4
...


Figure 36: 4-bit converter



Two PSUs to power the Op Amp
...


Figure 37: Duel PSUs



A selection of wires to connect everything together
...
Hudson

35

Digital & Analogue Devices
05 March, 2014

Figure 38: Oscilloscope showing input and output voltages

The values shown in Figure 38 differ from those in the simulator primarily because different input voltages
were used
...
0 V
...
0, -12
...
)
The resistance of the wires may have affected the input ratios slightly
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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Table 11: Ideal vs
...


Gain vs
...


Input resistance

Infinite
...


Output resistance

Zero
...


Input voltage offset

Zero
...


Output voltage

Can swing to the positive or negative
supply rails
...

Takes a finite time to reach the
output value and additional time to
settle (slew rate)
...


Real Op Amp
Very high gain
...

Gain remains constant up to about
10kHz
...
Voltage gain was not an issue for any of the circuits because at most a gain of *8 was required
...
Frequency was not a problem, because two of the circuits were DC (i
...
a frequency of 0Hz) and the
integrator circuit used a frequency of 1Hz
...
The input resistance of the Op Amp was far higher than any of the resistors used in the circuit
...

4
...
So
for the purpose of these experiments it was as good as zero
...
The output voltage was kept well below the values of the Op Amp supply rails
...
The time taken for the output to react to the input was small enough to be of no consequence
...


HNC Electrical and Electronic Engineering

Year One: 2013/14

Keith A
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BBC - GCSE Bitesize: Highest common factor and lowest common multiple
...
bbc
...
uk/schools/gcsebitesize/maths/number/primefactorshirev1
...

Bird, J
...
19
...
In: Electrical and Electronic Principles and Technology
...

Oxford: Newnes, pp
...

Middlesbrough College, 2013
...
Middlesbrough: Middlesbrough College

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