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---

MICROPROCESSORS
AND
MICROCOUNTROLLERS

BY

S
...
tech,(Ph
...
The size of the data is specified as
Bit,Byte,Word……
...
The 8086 processor uses 20-bit
address for memory
...
The memory word
size for 8086 processor based system is 8-bit
...
It is used as CPU(Central Processing Unit) in
computers
...

Buses can be classified into
Data bus
Address bus
Control bus

3

•

CPU bus
The group of conducting lines that are directly connected
to microprocessor are called CPU bus
...
e
...
Multiplexing is not allowed in system bus
...




All general-purpose computers require the following hardware components:

Memory: Enables a computer to store, at least temporarily, data and programs
...
Common
mass storage devices include disk drives and tape drives
...

Output device: A display screen, printer, or other device that lets you see what the computer has
accomplished
...
In addition to these components, many others make it possible for the basic
components to work together efficiently
...
Computers can be generally classified by size and power as follows, though there is
considerable overlap:
Personal computer: A small, single-user computer based on a microprocessor
...

Working station: A powerful, single-user computer
...

Minicomputer: A multi-user computer capable of supporting from 10 to hundreds of users
4

simultaneously
...

Supercomputer: An extremely fast computer that can perform hundreds of millions of
instructions per second
Minicomputer:
A midsized computer
...

A minicomputer, a term no longer much used, is a computer of a size intermediate between a
microcomputer and a mainframe
...
In
recent years, the minicomputer has evolved into the "mid-range server" and is part of a network
...
The AS/400 - formally renamed the "IBM iSeries," but still
commonly known as AS/400 - is a midrange server designed for small businesses and epartments
in large enterprises and now redesigned so that it will work well in distributed networks with Web
applications
...

Mainframe: A very large and expensive computer capable of supporting hundreds, or even
thousands, of users simultaneously
...
In some ways, mainframes are more powerful than supercomputers ecause
they support more simultaneous programs
...
The distinction between small mainframes and minicomputers is vague,
depending really on how the manufacturer wants to market its machines
...
Microcomputers are designed to be used by
individuals, whether in the form of PCs, workstations or notebook computers
...

Instruction set: The set of instructions that the microprocessor can execute
...

Clock speed: Given in megahertz (MHz), the clock speed determines how many instructions per
second the processor can execute
...

A supercomputer is typically used for scientific and engineering applications that must handle
very large databases or do a great amount of computation (or both)
...
The term is also sometimes applied to far slower (but still impressively fast) computers
...

Microcontroller: A highly integrated chip that contains all the components comprising a
controller
...
Unlike a generalpurpose computer, which also includes all of these components, a microcontroller is designed for
a very specific task - to control a particular system
...

A microcontroller is meant to be more self-contained and independent, and functions as a tiny,
dedicated computer
...
They are
typically designed using CMOS (complementary metal oxide semiconductor) technology, an
efficient fabrication technique that uses less power and is more immune to power spikes than
other techniques
...

Controller: A device that controls the transfer of data from a computer to a peripheral device and
vice versa
...

In personal computers, the controllers are often single chips
...

Digital: operating by the use of discrete signals to represent data in the form of numbers
...


6

Evolution of Microprocessors
•

The various calculating machines(ancient)
Abacus (primitive calculator made of beads used by Babylonians)(about 500 B
...
)
Calculating machine developed by Blaise Pascal (using gears and wheels)(in 1642)
1st geared automatic computing machine introduced in early 1800‟s
Computing machines using relays and vacuum tubes(in 1940‟s and 1950‟s)
Computing machines using solid state devices(in 1960‟s)
Computing machines using ICs (in late 60‟s and early 70‟s)

Date
1947
1958

Event

Comments

st

Bell Labs

1 transistor
st

Jack Kilby (MSEE ‟50) @TI

1 IC

Winner of 2000 Nobel prize
1971

st

Intel (calculator market)

1 microprocessor

1974

Intel 4004

2300 transistors

1978

Intel 8086

29K transistors

1989

Intel 80486

1M transistors

1995

Intel Pentium Pro

5
...
7B transistors

•

Transistor in 1948
IC in 1958
digital IC‟s in 1960‟s
7

1st microprocessor in 1971
•

Some of the 1st microprocessors introduced were
F4  Fair Child
PPS4  Rockwell

•

INTEL 4004  less than 50 instructions
Addressing 4096 locations of 4-bits/Nibble each
...
there were 45 different instructions in
the instruction set of 4004
...
It contained approximately 2300
PMOS transistors
...


•

8008  In 1972 INTEL developed a eight but microprocessor
...


•

8080  In 1974 INTEL developed 8080 which had much larger instruction set than 8008 and
require only two additional devices to form a functional CPU
...

So it can operate much faster than 8008
...


•

MC6800  To avoid difficulties in 8080 which require different power supplies
...
For several years 8080 and 6800 were top
selling 8-bit processors
...
INTEL produced 8085, an upgrade of 8080, requires only +5V
supply
...


•

8086  In 1978 INTEL developed 8086 which is full 16-bit processor, it contains approximately
29,000 transistors and is fabricated using HMOS technology
...

14

•

Comes in Dual-In-Line Package(DIP) IC
...


•

Works on 5 volts power supply and draws a current of 360 ma, with an internal circuitry made up
of 29K transistors
...


•

It is built on single semiconductor chip and packaged in an 40-pin IC
...


•

It can directly address upto 220 I
...
, 1M bytes of memory
...


•

The 20-bit address bus is time multiplexed:

 The lower order 16-bit address bus is time multiplexed with data bus
...

•

The maximum internal clock for 8086 is 5MHz
...


(the INTEL 8284 clock generator/driver is used to generate the clock signal for 8086 microprocessor
•

The clock signal is divided by 3 in case of 8086 for internal clock requirements
...
e
...
These
registers are a set of data registers, which are used to hold intermediate results
...
Each of these registers may be used separately as 8 -bitstorage areas
or combined to form one 16-bit ( one word) storage area
...
The AH-AL pair is referred to as the AX register,
the BH-BL pair is referred to as the BXregister, the CH-CL pair is referred to as the CX register,
and the BH-BL pair is referredto as the DX register
...

For 16-bit operations, AX is called the accumulator

...

Many programs written for the 8080 and 8085 could easily be translatedto run on the 8086
...
If
the result is more than 16-bits, the lower order 16-bits
are stored in accumulator and higher order 16-bits are
stored in DX register)

Pointer and Index Registers

•

All 16 bits wide, L/H bytes are not accessible

•

Used as memory pointers
–

Example: MOV AH, [SI]
•

Move the byte stored in memory location whose address is contained in register
SI to register AH

•

IP is not under direct control of the programmer
19

•

used to keep offset addresses
...


•

In the case of SP and BP the default reference to form a physical address is the Stack Segment
(SS-will be discussed under the BIU)

•

The index registers (SI & DI) and the BX generally default to the Data segment register (DS)
...
Thus, SI is associated with the DS in string operations
...


– When string operations are performed, the DI register points to memory locations in
the data segment which is
addressed by the ES register
...

•

The SI and the DI registers may also be used to access data stored in arrays
Instruction pointer & summing block

•

The instruction pointer register contains a 16-bit offset address of instruction that is to be
executed next
...


•

The value contained in the instruction pointer is called as an offset because this value must
be added to the base address of the code segment, which is available in the CS register to
find the 20-bit physical address
...

20

•

To form a 20bit address of the next instruction, the 16 bit address of the IP is added (by the
address summing block) to the address contained in the CS , which has been shifted four
bits to the left
...

It also contains a 16-bit Source index (SI) register and a 16-bit destinationindex
(DI) register
...
However, their main use is to hold the 16-bit offset of a dataword in one of the segments
...

When used in this manner, these registers areaddress registers that designate a specific location in
the memory that may be frequentlyused by the program
...


Segments, Segment Registers & Offset Registers
•

4 Segments in 8086
–

Code Segment (CS)

–

Data Segment (DS)

–

Stack Segment (SS)

–

Extra Segment (ES)

SEGMENT

SEGMENT OFFSET
REGISTER
REGISTER

Code Segment

CSR

Instruction Pointer
(IP)
21

Data Segment

DSR

Source Index (SI)

Extra Segment

ESR

Destination Index
(DI)

Stack Segment

SSR

Stack Pointer (SP)
/ Base Pointer (BP)

Flag Register

•

A flag is a flip flop which indicates some conditions produced by the execution of an instruction
or controls certain operations of the EU
...

Ø 6 flags indicates some conditions- status flags
Ø3 flags –control Flags

Flag

Purpose

23

Carry (CF)

Holds the carry after addition or the borrow after subtraction
...


Parity (PF)

PF=0;odd parity, PF=1;even parity
...
)

Zero (ZF)

Shows the result of the arithmetic or logic operation
...
Z=0; The result is 0

Sign (SF)

Holds the sign of the result after an arithmetic/logic instruction
execution
...

Enables the trapping through an on-chip debugging
feature
...

Controls the operation of the INTR (interrupt request)
I=0; INTR pin disabled
...


Direction (DF)

A control flag
...


Overflow (OF)

Overflow occurs when signed numbers are added or
subtracted
...


•

For example, if register AL = 7Fh and the instruction ADD AL,1 is executed then the following
happen
AL = 80h
CF = 0; there is no carry out of bit 7
PF = 0; 80h has an odd number of ones
AF = 1; there is a carry out of bit 3 into bit 4
ZF = 0; the result is not zero
SF = 1; bit seven is one
OF = 1; the sign bit has changed

8086 Programmer‟s Model

25

Memory organization
•

At any given time the 8086 works with only four 65,536-byte (64-Kbyte) segments within the
1,048,576- byte (1-Mbyte) range
...


8086 introduced memory segmentation to overcome the 16-bit addressing barrier of earlier chips
...




The CPU 8086 is able to address 1Mbyte of memory
...


Code segment (64KB)
Data segment (64KB)
Extra segment (64KB)
Stack segment (64KB)
27

•

The size of each segment is 64 KB

•

A segment is an area that begins at any location which is divisible by 16
...

–

Code segment is used for storing the instructions
...


–

The data and extra segments are used for storing data byte
...
But only one segment of each type can be accessed at any time
...


•

A Segment is a 64kbyte block of memory
...


•

Segments may be overlapped or non-overlapped
Advantages of Segmented memory Scheme

•

Allows the memory capacity to be 1Mb although the actual addresses to be handled are of
16 bit size
...


•

Permits a program and/or its data to be put into different areas of memory each time
program is executed, i
...
provision for relocation may be done
...
The above can be achieved by using more than one code,
data or stack segments
...


•

All are 16 bit registers
...


Memory Address Generation
•

The BIU has a dedicated adder for determining physical memory addresses
...

A stack is a section of memory set aside to store addresses and data while a subprogram executes
...


34

Segment : Offset Address
•

Logical Address is specified as segment:offset

•

Physical address is obtained by shifting the segment address 4 bits to the left and adding the
offset address
...

–
–

•

Base Address (16 bits)
Offset Address (16 bits)

Segment registers are used to store the Base address of the segment
...
An entire 64 K bytes segment is set aside as Stack in
8086MPU
...
The Stack Pointer (SP) register contain the 16-bit offset from the start
of the segment to the memory location where a word was most recently stored on the Stack
...
Fig
...
The physical address for a stack read or for a stack write is produced by
adding thecontents of the stack pointer register to the segment base address in SS
...
In the figure 5000 H in SS is shifted
37

left four bit positions to give 50000H
...
The physical address can be
representede i t h e r a s a s i n g l e n u m b e r 5 F F E O H , o r i t c a n b e
r e p r e s e n t e d i n S S : S P f o r m a s 5000:FFEOH

38

39

40

INTEL 8086
MICROPROCESSOR
1

Intel 8086 Internal Architecture

Internal architecture of 8086
•

8086 has two blocks BIU and EU
...


41

•

The BIU performs all bus operations such as instruction
fetching, reading and writing
operands for memory and calculating the addresses of the memory operands
...


•

EU executes instructions from the instruction system byte queue
...
This results in efficient use of the system
bus and system performance
...


•

EU contains Control circuitry, Instruction decoder, ALU, Pointer and Index register, Flag
register
...


•

The Instruction Pointer (IP)
...


•

This queue permits pre-fetch of up to 6 bytes of instruction code
...


•

These pre-fetching instructions are held in its FIFO queue
...


•

After a byte is loaded at the input end of the queue, it automatically shifts up through the
FIFO to the empty location nearest the output
...
It reads one instruction byte after the other
from the output of the queue
...

If the BIU is already in the process of fetching an instruction when the EU request it to read or
write operands from memory or I/O, the BIU first completes the instruction fetch bus cycle
before initiating the operandread / write cycle
...
This address is
formed by adding an appended 16 bit segment address and a 16 bit offset address
...
· The BIU is also responsible for generating bus control signals such as those for
memory read or write and I/O read or write
...

The main parts are:

•

Control Circuitry
43

•

Instruction decoder

•

ALU

EXECUTION UNIT – General Purpose Registers

44

The Execution unit is responsible for decoding and executing all instructions
...
During the execution of the
instruction, the EU tests the status and control flags and updates them based on the results of
executing the instruction
...


· When the EU exec utes a branch or jump instruction, it transfers control to a location
corresponding to another set of sequential instructions
...


Addressing Modes of 8086 Processor
The 80x86 processors let you access memory in many different ways
...
Mastery of the 80x86 addressing modes
is
the
first
step
towards
mastering
80x86
assembly
language
...
Intel added several new addressing modes when it introduced
the 80386 microprocessor
...
If you need to write code that works on 80286 and
earlier processors, you will not be able to take advantage of these new modes
...
Since
many programmers still need to write programs that run on 80286 and earlier machines, it's
important to separate the discussion of these two sets of addressing modes to avoid confusing
them
...
By specifying the
name of the register as an operand to the instruction, you may access the contents of that register
...
The eight
and 16 bit registers are certainly valid operands for this instruction
...
Now let's look at some actual 8086 mov instructions:
mov
mov
mov
mov
mov
mov

ax, bx ;Copies the value from BX into AX
dl, al ;Copies the value from AL into DL
si, dx ;Copies the value from DX into SI
sp, bp ;Copies the value from BP into SP
dh, cl ;Copies the value from CL into DH
ax, ax ;Yes, this is legal!

Remember, the registers are the best place to keep often used variables
...
Throughout
this chapter you'll see the abbreviated operands reg and r/m (register/memory) used wherever
you
may
use
one
of
the
8086's
general
purpose
registers
...
There are two
restrictions on the use of the segment registers with the mov instruction
...

You cannot move data from one segment register to another with a single mov instruction
...
They
should only contain segment addresses
...
Throughout this text you'll see
the abbreviated operand sreg used wherever segment register operands are allowed (or required)
...
This may seem like quite a bit at first,
but fortunately most of the address modes are simple variants of one another so they're very easy
to learn
...

The addressing modes provided by the 8086 family include displacement-only, base,
displacement plus base, base plus indexed, and displacement plus base plus indexed
...
See, from 17 down to
five
...

 Immediate Addressing Mode
...

 Direct addressing Mode
...


47

Register Indirect Addressing Modes

48

The 80x86 CPUs let you access memory indirectly through a register using the register indirect
addressing modes
...
The [bx], [si], and [di] modes use the ds
default
...


You can use the segment override prefix symbols if you wish to access data in different
segments
...
Intel refers to the [si] and [di] addressing modes as indexed addressing
modes (si stands for source index, di stands for destination index)
...
This text will call these forms register indirect modes to be
consistent
...


Ex :

49

Addressing modes which are new to 8086 processor
...
Likewise, if bp contains 2020h, mov dh,1000h[bp] will load dh from location ss:3020
...
The addressing modes involving bx, si, and di all use the data segment, the disp[bp]
51

addressing mode uses the stack segment by default
...

Note that Intel still refers to these addressing modes as based addressing and indexed addressing
...
If you
look at how the hardware works, this is a reasonable definition
...
Which is why this
text uses different terms to describe them
...


Ex:

52

Based Indexed Addressing Modes
The based indexed addressing modes are simply combinations of the register indirect addressing
modes
...
The allowable forms for these addressing modes are
mov
mov
mov
mov

al, [bx][si]
al, [bx][di]
al, [bp][si]
al, [bp][di]
Suppose that bx contains 1000h and si contains 880h
...
Likewise, if bp contains 1598h and di contains
ax,[bp+di] will load the 16 bits in ax from locations SS:259C and

1004, mov
SS:259D
...
Those that have bp
as an operand use the stack segment by default
...


You substitute di in the figure above for the [bp+di] addressing mode
...
The following are some examples of these
addressing modes:

mov
mov
mov
mov

You

al, disp[bx][si]
al, disp[bx+di]
al, [bp+si+disp]
al, [bp][di][disp]
may substitute di in the figure

above to produce the [bx+di+disp] addressing mode
...

Suppose bp contains 1000h, bx contains 2000h, si contains 120h, and di contains 5
...


Ex:

55

Procedures and Macros
 Procedures:
When a group of instructions are to be used several times to perform a same
function in a program, then we can write them as separate subprogram called procedure or
subroutine
...

Procedures are written and assembled as separate program modules and stored in
the memory
...
e
...

When procedure is called in main-program control is transferred to procedure and
after execution the control is transferred back to main program, procedures are called using CALL
instruction and returned back using RET instruction
...

 Types of Procedures:
i
...


Intra-segment Procedure
Inter-segment Procedure

Depending on occurrence in program
o

Single Procedure

o

Nested Procedure

o

Re-Cursive Procedure

o

Re-Entrant Procedure

 Intra-Segment Procedure:
CALL  (SP)  (SP) – 2
56

((SP) + 1 : (SP))  (IP)
(IP)  (EA)
RET  (IP)  ((SP) + 1 : (SP))
(SP)  (SP) +2
 Inter-Segment Procedure:
CALL  (SP)  (SP) – 2
(((SP) + 1) : (SP))  (CS)
(SP)  (SP) –2
(((SP) + 1) : (SP))  (IP)
(IP)  (EA)
(CS)  Seg
...
e
...

 Push all the flags and all registers used in the procedure
...

•

Re-Entrant Procedures:

 Passing Parameters to procedures:
o

Using global declared variables
...


o

Using dedicated memory locations accessed by name
...


o

Using stack
...


o

All the globally declared variables need to be remembered
...


o

Can be implemented only by using ASSEMBLER and not by any other means
...


o

Each register assigned to the parameter need to be remembered and care to be
taken that they are properly used and altered in the procedure
...


 Features of Passing parameters using Pointers passed in registers:
o

Limited registers for pointers
...


 Passing parameters using stack Memory:
Code SEGMENT
ASSUME CS: Code, SS:Stack
START: Mov AX, Stack
Mov SS, AX
Mov AX, 0011H

X1 PROC Near

Mov BX, 2220H

:
Push BP

:

Mov BP, SP

Push AX

Add BP, 02H

Push BX

Mov BX,[Bp]

CALL X1

MovAX,[Bp+2]

:

Sub AX, BX

INT 21H

:
Pop BP
RET
X1 ENDP
Code ENDS
63

END START
 Features of Passing parameters using Pointers passed in registers:
o

Unlimited storage
...


o

Requires to use PUSH and POP instructions
...


 MACROS:
o

When a group of instructions are to be used several times to perform a same
function in a program and they are too small to be written as a procedure, then they
can be defined as a MACRO
...


o

The MACROS are identified by their names and usually defined at the start of a
program
...


o

X1 MACRO
Mov SI, OFFSET Arr
Mov DI, OFFSET Arr1
Mov AL, (SI)
Add AL, (DI)
Inc SI
Inc DI
ENDM

 Passing parameters in MACROS:
X1 MACRO Arr, Arr1
:
END M
64

:
X1 Arr2,Arr3
:
X1 Arr4, Arr5
:
 Advantages and Disadvantages Of Procedures and Macros:
 Procedures:
 Advantages:
1
...


put in

2
...

o

Disadvantages:

1
...

2
...


 Macros
 Advantages:
1
...
No over-head time required
...

 Comparison of Procedures and Macros:

S
...


Procedures

Macros

1
...
generated for instructions
in the Macro each time it
65

is called in the main
program
...


Accessed by CALL and RET Accessed
during
mechanisms during program assembly with name
execution
...


3
...


4
...

calls Macro
...


Can be present in Same (or) Usually defined at the
different segment as that of the beginning of program in
main program
...

•

Delay Calculations

•

Size is limited to few
lines
...
1*10-6
= 10+28*(count-1)*10-7

INTEL 8085
Features
•

INTEL 8085 is an 8-bit microprocessor
...
Hence has 8-bit data bus
...
Hence uses 16-bit address bus
...


•

It can directly address 216 = 65,536 bytes i
...
, 64 Kbytes (64 K memory locations) using 16bits of address
...


•

INTEL 8085-Features

•

It requires a single power supply of +5V
...


•

The generated clock is divided by a factor of 2, hence to operate an 8085 based system at an
frequency of 3 MHz, an crystal of 6 MHz frequency need to be connected to 8085
...
03 MHz and 5 MHz respectively and hence require an crystal of 6
...

67

•

The enhanced version of 8085 is designed with HMOS transistors
...


•

The clock cycle of 8085 is of order of 320 ns and that for 8085AH-2 version is 200 ns
...


•

8085 is enhanced version of its predecessor the 8080A microprocessor; thus its instruction
set is upward compatible with that of 8080A, i
...
, 8085 instruction set includes all the 8080A
instructions plus some more instructions
...


•

But 8085 and 8080A are not pin compatible, i
...
, the 8085 microprocessor can not be used in
place of 8080A microprocessor in an 8080A based system
...
t
...

•

Timing And Control Unit

•

It is section of CPU
...


•

Provides status, control and timing signals which are required for the operation of memory
and I/O devices
...


•

Data remains in the register till they are sent to the memory or I/O devices
...
e
...
These are B,C,D,E,H and L
...


•

Registers

•

Accumulator:


Accumulator is an 8-bit register associated with the ALU
...

70


•

After the operation is completed the accumulator holds the final result
...




To hold 16-bit data a combination of two 8-bit registers can be used and are known
as register pair
...




H-L pair can be used as an memory pointer to access the 16-bit address of an
memory location indirectly
...




BC, DE and HL registers are known as “scratch pad” registers
...


Basically this register array is like a small chip of RAM with addressable memory
locations
...


Program Counter (PC):



It is used to hold the memory address of the next instruction to be executed
...




The microprocessor increments the contents of the program counter during the
execution of an instruction so that it points to the address of the next instruction in
the program at the end of the execution of an instruction
...


It is not programmer accessible
...




The stack pointer holds the address of the top of the stack i
...
, the top most element
of data stored in stack and controls the addressing of the stack of 8085
...




Stack works on FIFO(first-in-first-out) principle
...




During the execution of a program some times it becomes necessary to save the
contents of the registers which are needed for some other operations in the
subsequent steps of the program
...




After saving the contents in the stack the registers can be used for some other
operations
...
The contents of only those registers
which are needed in the later part of the program
...




•

Any portion of the memory can be used as stack
...


Instruction Register / Decoder :



The decoder interprets the instruction and produces the proper signals to carry it
out
...


It is not programmer accessible
...




It is used by the microprocessor
...



•

It is an 8-bit register associated with the ALU
...


Program Status Word:
 The five bits of the flag register which provide the information about the status of
the instruction execution along with the three undefined bits is known as PSW
(program status word)
...


•

Flag Register

•

The flag register of 8085 microprocessor
7

6

5

4

3

2

1

0

The INTEL 8085 microprocessor contains five flip-flops to serve the status of the
program/instruction execution as status flags
...

The five status flags of INTEL 8085 are :
1
...
Parity Flag (P)
3
...
Zero Flag (Z)
5
...
When it resets it indicates 0
...

The carry flag is set or reset in case of addition as well as subtraction
...

In case of subtraction, if the borrow occurs, the carry flag is set to 1
...



Parity Flag (P):
The parity status flag P is set to 1, if the result of an arithmetic or logical operation
contains even number of 1‟s
...
e
...
e
...




Zero Flag (Z):
The Zero status flag (Z) is set to 1, if the result of an arithmetic or logical operation
is 0
...
e, set to 0
...
If the result is positive it is reset i
...
, set to 0
...

To represent a signed number the most significant bit is reserved by the
programmer to represent the sign of a number i
...
, the MSB is used as a sign bit which
represents the sign of the number, if the number is negative the sign bit is 1 and if the
number is positive the sign bit is 0
...




Sign Flag (S):
After the execution of signed arithmetic operation, the MSB of the result represents
its sign
...
Hence, it represents the sign of the result
...
After the execution of an arithmetic operation, all the 8-bits of
the result represents its magnitude
...

For logical operations also the sign bit has no significance, as the sign flag is set or
reset depending on the value of the MSB of the result, it is set or reset on the value of MSB
of the result of logical operations also
...

In case of 16-bit operation 15-bits are used for representing the magnitude of the
number and the 16th bit is used for representing the sign of the number
...


•

Effect on the flag register for example of “ CB + E9”
CB = 1 1 0 0 1 0 1 1
E9 = 1 1 1 0 1 0 0 1
1 -------------------10110100
There is a carry from bit position 3 to bit position 4 thus AC = „1‟(set)
There is a carry from bit position 7 to bit position 8 thus CY = „1‟(set)
There is a non zero result thus Z = „0‟
There are even number of 1‟s thus P = „1‟
MSB = 1 thus S = „1‟
...
Internal Data Bus
2
...
Interrupt Control
4
...
Address Buffer and Address / Data Buffer

 Internal Data Bus:
The internal data bus is 8-bits inside and carries instructions and data between the
CPU registers
...

In 8085 there is such provision through SID and SOD pins
...

76

The SOD pin is used for serial output
...

There is provision of both hardware and software interrupts in INTEL 8085
microprocessor
...
5, RST 6
...
5, INTR
...
5, RST 6
...
5
...

When these hardware interrupts are used they are to be enabled by enabling EI flipflop using software instruction EI (Enable Interrupt) in the main program
...


The instruction DI (disable Interrupts) is used to disable all the interrupts except
the non-maskable interrupt TRAP
The system reset also resets the interrupt enable flag(flip-flop)
...
It also resets the Interrupt enable flip-flop before
taking up ISR so that further occurrence of any interrupt is avoided during the execution of
current ISR, as all the interrupts except TRAP can be prevented by resetting the EI flipflop
...

Before the program returns back from the ISR to the main program all the
interrupts are to be enabled using the instruction EI before RET instruction in the ISR
...
7
...
This is used in debugging of a program
...

Interrupt

Call-location in HEX

TRAP

0024

RST 7
...
5

0034

RST 5
...
5,RST 6
...
5 are maskable interrupts
...
The execution of the
instruction SIM enables / Disables interrupts according to the bit Pattern of the
accumulator
...
Basically this section includes an oscillator and controller
sequence
...


•

Address Buffer and Address / Data Buffer:

78

The contents of stack pointer or program counter can be loaded into these buffers
...
The internal data bus is
also connected to the address / data buffer to send or receive the data
...
Its data bus is 8-bit wide and hence, 8 bits of
data can be transmitted in parallel from or to the microprocessor
...


•

The 8 most significant bits of the address are transmitted by the address bus, A-bus (pins A8
– A15)
...


•

The Address / Data bus transmits data and address at different moments
...
Thus the AD – bus operates in time shared
mode
...


•

Pin Configuration Of 8085

•

The logical pin out of an 8085 microprocessor consists of an 40-pin DIP package
...
e
...

They are used for the least significant 8-bits of memory address or I/O address
during the first clock cycle of the machine cycle
...

80

•

Control and Status signals:
___
This group of signals includes two control signals ( RD
___

__

and WR), three status signals ( IO/M , S1 and S0) to identify the nature of the operation,
and one special signal (ALE) to indicate the beginning of the operation
...
It goes high during the first clock cycle of a
machine cycle and enables the lower 8 bits of the address to be latched either into the
memory or external latch
...


•

___
WR : Write
Output and Tri-stated line
It is a signal to control Write operation
When it goes low the microprocessor writes the data into the selected memory or
I/O device
...


__
IO/M : I/O or Memory indicator
Output and Tri-stated line
...


81

When it goes high the address is for an I/O device and when it goes low the address
on the address bus is for a memory location
...

The status output signals from microprocessor and these signals gives the
information about the various types of operations that take place
...


S0

Operations

0

0

HALT

0

1

WRITE

1

0

READ

1
•

S1

1

FETCH

Power Supply and Clock Frequency Signals
The power supply and frequency signals are as follows:
 VCC : + 5 V Power Supply
 VSS : Ground Reference
 X1 and X2 : Crystal or RC Connections
Input lines
These are terminals to be connected to an external crystal oscillator which drives an
internal circuitry of the microprocessor to produce a suitable clock for the operation of
microprocessor
...
Its frequency
is same at which processor operates
...

apart from the interrupt signals there are the following externally initiated signals
associated with 8085 microprocessor pin configuration they are
82

HOLD
HLDA
READY
RESET OUT
_________
RESET IN
•

INTERRUPT Signals
TRAP , RST 5
...
5, RST 7
...
Among all the interrupts this has
the least priority, when it goes high the program counter does not increment its
contents
...

The INTR line is sampled in the last state of the last machine cycle of the instruction
being executed
...

The INTR is enabled or disabled by software
...


•

(INTA)‟ : Output
It is an Interrupt Acknowledgement sent by the microprocessor after INTR is
received
...
Having received a HOLD request the microprocessor relinquishes the use of the buses
as soon as the current machine cycle is completed
...

When a HOLD is acknowledged,address bus, data bus, (RD)‟, (WR)‟ and IO/(M)‟
are Tri-stated
...
It indicates that the HOLD request has
been received
...

The CPU takes over the buses after Half clock cycle of removal of HLDA signal
...

A slow peripheral may be connected to the microprocessor through the Ready line
...
If it is low the microprocessor waits till it
goes high
...


•

(RESET IN)‟ : Input
It resets the program counter to zero
...
It does not affect any other flag or register except the instruction register
...


•

Serial I/O ports
The 8085 microprocessor has two signals for serial communication i
...
, SID and
SOD
 SID: Serial Input Data (Input)
It is data line for serial input
...

 SOD : Serial Output Data (Output)
It is a data line for serial output
...


Simple programs on 8086 :
84

Simple Programs of 8086
1
...
8-bit Subtraction
;program for 8 bit subtraction
code segment
assume cs:code
start: mov al,-95
mov bl,76
85

sub al,bl
int 3h
code ends
end start

3
...
8-bit Division
;program for 8 bit division
code segment
assume cs:code
start: mov al,88h
mov bl,44h
div bl
int 3h
code ends
end start

5
...
16-bit Subtraction
;program for 16bit subtraction

code segment
assume cs:code
start: mov ax,4444h
mov bx,2222h
sub ax,bx
int 3h
code ends
end start

7
...
16-bit Division
;program for 16bit division
code segment
assume cs:code
start: mov ax,4444h
mov dx,0000h
mov bx,2222h
div bx
int 3h
code ends
end start

9
...
32-bit Subtraction
;program for 32bit subtraction
code segment
assume cs:code
start: mov ax,5555h
mov bx,3333h
mov cx,9999h
mov dx,4444h
sbb ax,bx
sub cx,dx
int 3h
90

code ends
end start

11
...
32-bit Division
;program for 32 bit division
code segment
assume cs:code
start: mov ax,8888h
mov dx,8888h
mov bx,9999h
div bx
int 3h
code ends
end start

13
...
Explain differences between a microprocessor and microcontroller? What is the differences
between 8085 and 8086 microprocessor?
2
...

3
...

4
...

5
...

6
...
Explain the timing diagrams in 8086 microprocessor
...
Given that (BX) = 637D, (SI) = 2A9B and Displacement = C237
a
...
Immediate
ii
...
Register using BX
iv
...
Register relative using BX
vi
...
Based indexed relative addressing modes
9
...
Intra segment direct addressing
2
...
Intra segment indirect addressing which uses the BX register and register relative
addressing

10
...
For operating 8086 in minimum mode pin number 33 is __MN________
2
...
8086 is a _16______ bit microprocessor
4
...
General purpose registers in 8086 microprocessor are _AX,BX,CX,DX______
6
...
There is no 20 bit registers in 8086 mp
...
What are the contents of flag register in 8086 microprocessor?
i)It is 16 bit reg
ii)it having 9 active flags(6 conditional flags and 3 control flags)
8
...

If no bus cycle are required ,the mp performs what are known as idle state
...

The EU accesses the queue from the output end
...
If the queue is full and the EU is not requesting
access to operand in memory
...
What is a wait state
A wait state is a delay experienced by a computer processor when accessing external memory
or another device that is slow to respond
...


This state is used by slow peripheral devices
...
The microprocessor remains in wait state
as long as READY line is low
...

10
...
Name different segments in 8086 microprocessor
CS,SS,DS,ES
12
...
Each register in 8086 is of ___16_____ bit wide
14
...
what is the purpose of execution unit in 8086 microprocessor
ANS: Write short note on the Execution Unit (EU) and the Bus Interface Unit (BIU)
...

They are dependent and get worked by each other
...


Execution Unit (EU) : Execution unit receives program instruction codes and
data from the BIU, executes them and stores
the results in the general registers
...
This unit, EU, has no connection with the system Buses
...


ALU (Arithmetic and Logic Unit) : The EU unit contains a circuit board
called the Arithmetic and Logic Unit
...


Registers : A register is like a memory location where the exception is that
these are denoted by name rather than numbers
...
AX, BX, CX and DX registers has 2 8-bit registers to access the
high and low byte data registers
...
Similarly, the high and low bytes of BX, CX, DX are BH and BL, CH and Cl, DH
and DL respectively
...
Else
these, the temporary register holds the operands for the ALU and the individual bits of
the FLAGS register reflect the result of a computation
...
BIU and EU are connected with an internal bus
...
It is responsible for transmitting data, addresses and
control signal on the busses
...
These all 4
segment registers holds the addresses of instructions and data in memory
...
It also contain 1 pointer register
IP
...


Instruction Queue : BIU also contain an instruction queue
...
This is a process to speed
up the processor
...


*****

UNIT-2
Assembly language
instructions :

programming

Write ALP and execute the program to
1
...
Add two 16-bit numbers
98

involves

all

the

3
...

5
...

7
...

9
...

11
...

13
...

15
...

17
...

19
...

21
...

23
...

25
...

27
...


Perform one byte BCD addition
Perform one byte BCD subtraction
Produce packed BCD from two ASCII characters
Convert decimal number to binary
Convert a binary number to a decimal number

Experiment VIII & IX : STRING MANIPULATION PROGRAMS
29
...

31
...

33
...

35
...
Display a message on the screen of a microcomputer
46
...
XII
...
Interface a stepper motor
48
...
Generate a square wave
50
...
Interface a keyboard
52
...
XV
...
Interfcing of 4x4 keypad and 7 segment display
54
...
8 bit ADC interface
56
...
DC motor interfacing

Course Objectives


Familiarize the architecture of 8086 processor, assembling language programming and
interfacing with various modules
...




Student able to do any type of VLSI, embedded systems, industrial and real time
applications by knowing the concepts of Microprocessor and Microcontrollers
...




Analyze and apply working of 8051



Compare the various interface techniques
...




Learning the Communication Standards
...


1
...
INTRODUCTION TO ASSEMBLY LANGUAGE PROGRAMMING

7

Levels of programming
Program Development Tools
Assembler Directives
3
...
PROGRAMMING MODEL OF 8086

22

5
...
BASIC ARITHMATIC OPERATIONS& ON KITS

28

2
...
BCD, DECIMAL,ASCII OPERATIONS

49

4
...
DOS AND BIOS INTERUPTS

67

6
...
1 STEPPER MOTOR PROGRAMMING
6
...
2
...
2
...
2
...
3 INTERFACE A KEYBOARD
6
...
8051 MICROCONTROLLER PROGRAMMING
6
...
6 DECIMAL COUNTER DISPLAY ON 7 SEGMENT LED
6
...
8 STEPPER MOTOR INTERFACING
6
...


Introduction to MASM

(Microsoft assembler) To Create Source File: An editor is a program which allows you to
create a file containing the assembly language statements for your program
...

Command to create a source file
C:\MASM\BIN> Edit filename
...
When you run the assembler, it
reads the source file of your program
...
and puts this
information in a symbol table
...
that it calculated during
first pass
...
asm X, Y, Z Enter

With this command assembler generates three files
...
The first file (X) called the object file, is given the extension
...

2
...
LST
...

3
...
CRF
...

To determine whether your program works, you have to run the program and test it
...


103

C:\MASM\BIN>LINK filename
...
exe] : “filename1
...
map] : NUL
Libraries [
...
def] :

Creation of Library: Refer Modular Programming Section
A Linker is a program used to join several object files into one layer object file
NOTE : On IBM PC – type Computers, You must run the LINK program on your
...

The linker produces a link file with the
...
Assembly Language Programming
The assembler uses two basic formats for developing S/W
a) One method uses MODELS and
b) Other uses Full-Segment Definitions
* The models are easier to use for simple tasks
...


a) Format using Models:
; ABSTRACT ; 8086 program
; Aim of Program
; REGISTERS ; Registers used in your program
; PORTS ; PORTS used in your program

...
e
...
MODEL SMALL

...
DATA; define data segment
-----------Define variables

...
EXIT 0 ; exit to DOS
105

END HERE
(or)
We can write Code segment as follows
...
CODE; Define Code Segment

...
EXIT 0
END
MEMORY MODELS FOR THE ASSEMBLER

106

LEVELS OF PROGRAMMING:
There are three levels of programming
1
...
Assembler language
3
...

Assembly language instructions match machine language instructions, but are written using
character strings so that they are more easily understood
...

Ultimately, an assembly language or high level language program must be converted into
machine language by programs called translators
...


ASSEMBLY LANGUAGE PROGRAM DEVELOPMENT TOOLS:
EDITOR: An editor is a program, which allows you to create a file containing the assembly
language statements for your program
...
The second file generated by assembler is called
the assembler List file
...
The
linkers produce link files with the
...

DEBUGGER: If your program requires no external hardware, then you can use a debugger to
run and debug your program
...


107

ASSEMBLER DIRECTIVES:
An assembler is a program used to convert an assembly language program into the equivalent
machine code modules
...
It then forms the machine code for mnemonics
and data in assembly language program
...
Commonly used assembler directives are DB, DD, DW, DUP, ASSUME,
BYTE, SEGMENT, MACRO, PROC, OFFSET, NEAR, FAR, EQU, STRUC, PTR, END,
ENDM, ENDP etc
...

DB :- Define byte directive stores bytes of data in memory
...

SEGMENT :- This directive is to indicate the start of the segment
...

ASSUME : - The ASSUME statement is only used with full segment definitions
...

EQU : - The equate directive equates a numeric ASCII or label to another label
...

PROC and ENDP : - The PROC and ENDP directives indicate start and end of a procedure
(Sub routine)
...
The PROC directive, must also be followed with the NEAR or FAR
...
A FAR procedure may
reside at any location in the memory system
...
The difference is
that a procedure is accessed via a CALL instruction, while a macro is inserted in the program at
the point of usage as a new sequence of instructions
...

ENDM : - The last statement of a macro is the ENDM instruction
...

PUBLIC &EXTRN : - The public and extern directives are very important to modular
programming
...
We use EXTRN to declare that labels are external to a
module
...

OFFSET : - Offset of a label
...

LENGTH : - Byte length of the label
...


109

3
...
Here we describe the ESA 86/88
– 2-trainer kit
...
The basic system can be easily expanded through the
system BUS connector
...
The on-board provision for 8087
numeric data processor makes it useful for number crunching applications
...

It is also provided with peripherals and controllers such as
8251A: Programmable communication Interface for serial communication
...

8288: Bus Controller for generating control signals
ESA 86/88-2 is operated from the CRT terminals or a host computer system via the serial
monitor and also can be operated from the on board key board
...

2
...

4
...


Press RST button
Type „EB‟
Type 2000 after starting address and press next key
Enter opcode and press next key to go next address
Press RST after entering all the opcodes

Procedure to execute a program:
1
...
GO and enter 2000 (starting address)
3
...
Press RST
2
...
Press next key
4
...
(Refer to the component layout
diagram in appendix C to locate the DIP switch and the jumpers)
...


111

Operational mode selection
ESA 86/88-2 can be operated either in the serial mode or in Hexadecimal keypad mode
...
In the keypad mode, the trainer is operated through
Hexadecimal keypad
...
OFF Serial mode
2
...
This driver can be enabled/disabled as shown below:
SW5 of the DIP Switch Printer Driver
1
...
ON Enabled
(*Factory installed Option)
Baud rate selection
In the serial mode of operation, ESA 86/88-2 configures an 8251A USART as follows:
1
...
8-bit character length
3
...
No parity
5
...
(Refer to
chapter 5 for a detailed discussion of the Hardware)
...

DIP SWITCH
1
...
Memory selection:
ESA 86/88-2 has four sockets, labeled U9, U8, U7, U6 for RAM
...
Two of these sockets are populated (providing 64K
Bytes of RAM) and two are for user expansion
...
even address ( jp4 ) RANGE FROM 0FFE0H to OFFE6H
Addresses for ports
PORT A - 00FFE0H
PORT B - 0FFE2H
PORT C - 0FFE4H
Control word register – 0FFE6H
2
...
Data to be
output in register AL
...

MODE 0: In this mode, all ports function as simple I/O ports without hand shaking
...

117

MODE 2: Only port A can be initialized in mode 2
...
Port B can be
initialized in mode 0 or mode1
...
When computer system is the controlling element it must be executing the
driver software to communicate with ESA 86/88-2
...
The link is established between asynchronous serial
ports of the computer and ESA 86/88-2
...

User can develop assembly language programs on the computer system, cross- assemble them
using a suitable cross assembler to generate object code files and then use WIN862 to download
these object code files into the trainer kit for execution
...
Assemble the
...
Link
...
exe file
3
...
exe file to
...

3
...
exe file
3
...
3 offset address give as 0000
3
...

Before using the EXE2HEX program make sure that there is no filename
...
exe file which you want to convert
...
On the kit make sure that switch 1-4 are ( on- off-off-off)
5
...
1 port setting should be port1, baud rate -9600, data- 8bit, stop bit- 1, parity-none
5
...
3 from file menu select download file: browse for corresponding hex file
5
...
5 here mention the starting segment and offset address
5
...

Win 86-2 also provides you the facility of memory view, modify, single stepping etc

119

4
...
Immediate Addressing Mode
Immediate data is a part of instruction and appears in the form of successive byte
or bytes
Ex:

MOV AX, 0005H

2
...
Register Addressing Mode
Data is stored in a register and it is referred using the particular register
Ex: MOV BX,AX
4
...
Indexed Addressing Mode
Offset of the operand is stored in one of Index register
DS is default segment for index registers SI and DI
For Strings DS and ES are default segments for SI and DI
EX:

MOV AX, [SI]

6
...
Based Indexed Addressing Register
Effective address of data is formed by adding content of base register to content
of Index register
Default segment register may be ES or DS
EX:

MOV AX,[BX][SI]

8
...
Intrasegment Direct Mode
Effective address to which the control is to be transferred is given by the sum of 8
or 16 bit displacement and current content of IP

122

EX: For JMP if signed displacement is 8 bits it is termed as short jump and if it
is 16 bits, it is termed as Long jump
10
...
Intersegment Direct Addressing Mode
Address to which the control is to be transferred is in a different segment
CS and IP of the destination address are specified directly in the instruction
EX:

JPM 5000H : 2000H

12
...
Contents of memory block contains 4bytes
(IP(LSB), IP(MSB), CS(LSB), CS(MSB)) Starting address of the memory block
may be referred using any of the addressing modes except immediate mode
EX: JMP [2000H]

123

5
...
DEBUG displays the contents of all processor registers after each
instruction executes, allowing user to determine if the code is performing the desired task
...
Code view is capable
of displaying the entire 32 bits
...
We will use DEBUG to
step through number of simple programs, gaining familiarity with DEBUG commands as we do
...

DEBUG loads into memory like any other program, in the fist available slot
...
If an
...
COM
file were specified, DEBUG would load the program according to the accepted conventions
...
EXE use this command:
DEBUG PROG
...

To get a list of some commands available with DEBUG is:
T trace (step by step execution)
U un assemble
D Dump
G go (complete execution)
H Hex
DEBUG- Testing and edition tool help ; MS-DOS based program
...
exe/
...
ARTHIMETIC OPERATIONS
1
...
MODEL TINY

...
CODE
START:
MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV AL,NUM1
MOV BL,NUM2
ADD AL,BL
MOV RESULT,AL
INT 3

...
2 16-BIT ADDITION


...
STACK 32H

...
DATA
NUM1 DW 0FFFFH
NUM2 DW 0FFFFH
RESULT DW 00
END START

RESULT: 0FFFFH 1111 1111 1111 1111 1111
0FFFFH 1111 1111 1111 1111 1111
1FFFEH 1,1111 1111 1111 1111 1110
CARRY

127

1
...
MODEL SMALL

...
CODE
MOV AX,@DATA
MOV DS,AX
MOV AX,WORD PTR (NUM1)
ADD AX,WORD PTR (NUM2)
MOV WORD PTR(RES),AX
MOV AX,WORD PTR (NUM1+2)
ADC AX,WORD PTR (NUM2+2)
MOV WORD PTR(RES+2),AX
INT 3H


...
4 8-BIT SUBTRACTION

...
STACK 32H

...
DATA
NUM1 DB 0FFH
NUM2 DB 0AAH
RESULT DB 00
END START

RESULT: 0FFH
0AAH
055H

129

1
...
MODEL TINY

...
CODE
START:
MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV AX,NUM1
MOV BX,NUM2
SUB AX,BX
MOV RESULT,AX
INT 3

...
6 32 BIT SUBTRACTIONS

...
STACK 32

...
DATA
NUM1

DD

44332211H

NUM2

DD

11223344H

RES

DD

?

END

131

1
...
MODEL TINY

...
CODE
START:
MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV AL,NUM1
MOV BL,NUM2
MUL BL
MOV RESULT,AL
MOV RESULT1,AH
INT 3

...
8 16-BIT MULTIPLICATION

...
STACK 32H

...
DATA
NUM1 DW 0FFFFH
NUM2 DW 0FFFFH
RESULT DW 00
RESULT1 DW 00
END START

RESULT: 0FFFFH
0FFFFH
FFFE0001H

133

1
...
MODEL TINY


...
CODE
START: MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV DX,00
MOV AX,NUM1
MOV BL,NUM2
DIV BL
MOV QUOTIENT,AL
MOV REMAINDER,AH
INT 3

...
10 16-BIT DIVISION (32 Bit by 16 Bit)

...
STACK 32H

...
DATA
NUM1 DW 0FFFFH
NUM2 DW 0AAAAH
QUOTIENT DW 00
REMAINDER DW 00
END START
RESULT: 0FFFFH
0AAAAH
55550001H QUOTIENT: 0001H
REMAINDER: 5555

1
...
MODEL TINY

...
CODE
START:
MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV AL,NUM1
MUL NUM1
MOV RESULT,AX
INT 3


...
12 Exchange two numbers

...
STACK 32H

...
DATA
NUM1 DB 0FH
NUM2 DB 05H
END

137

1
...
MODEL TINY

DATA SEGMENT
DP1 DB 0A5H
DP2 DB 20H
RES DW 00H
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE,DS:DATA

START: MOV AX,DATA
MOV DS,AX
SUB AX,AX
MOV AL,DP1
MOV BL,DP2
IMUL BL
MOV RES,AX
NOP
INT 3H
CODE ENDS
END START

1
...
SIGNED DIVISION
138


...
ARRAY PROGRAMMING
2
...
2 DISPLAY OF SQUARES OF N
...
3 SORTING IN ASCENDING ORDER
;REGISTERS:AX,BX,CX,DX,SI,DI,ES,DS
;PROCEDURE:NONE
;PORT:NONE
141

DATA SEGMENT
ARR DB 99H,88H,77H,66H,55H,44H
COUNT
DW 0006H
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA,ES:DATA
START:MOV AX,DATA
MOV DS,AX
MOV ES,AX
MOV DX,COUNT
DEC DX
NXTITER:MOV CX,DX
MOV SI,0

;STARTING ADDRESS OF DATA SEGMENT
;STARTING ADDRESS OF EXTRA SEGMENT
;NO OF ELEMENT IN AN ARRAYS=6
;NO OF COMPARISION=5

NXTCMP: MOV AL,ARR[SI]
CMP AL,ARR[SI+1]
;COMPARE TWO ELEMENTS
JC NOSWAP
;CARRY=SET INDICATES 1ST ELEMENT IS SMALLEST
XCHG AL,ARR[SI+1]
;SWAPPING OF 2 ELEMENTS
MOV ARR[SI],AL
NOSWAP: INC SI
;GO COMPARE FOR 2 AND 3 ELEMENT
LOOP NXTCMP
DEC DX
;GO FOR NEXT SMALLEST ELEMENT
JNZ NXTITER
INT 3H
;BREAK AND DISPLAY
CODE ENDS
END START

2
...
5 SQUARE ROOT OF A GIVEN NUMBER
DATA SEGMENT
NUM DB 25
RESULT DB (?)
DATA ENDS
CODE SEGMENT

143

ASSUME CS:CODE,DS:DATA
START:
MOV AX,DATA
MOV DS,AX
MOV CL,NUM
MOV BL,01
MOV AL,00
UP: CMP CL,00
JZ ZRESULT
SUB CL,BL
INC AL
ADD BL,02
JMP UP
ZRESULT: MOV RESULT,AL
INT 03H
CODE ENDS
END START

2
...
7 FIND LCM AND GCD OF TWO NUMBERS
...
8 FIBONACCI SERIES


...
DATA
FBS DB 10 DUP(?)

...
BCD, DECIMAL,ASCII OPERATIONS
3
...
MODEL TINY

...
CODE
START:
MOV AX,CS
MOV DS,AX
MOV AX,00
MOV AL,NUM1
MOV BL,NUM2
ADD AL,BL
DAA
146

MOV RESULT,AL
INT 3

ORG 0050H
NUM1 DB 03
NUM2 DB 08
RESULT DB 00
END START

147

3
...
MODEL TINY

...
CODE
ORG 2000H
START:
MOV AX,CS
MOV DS,AX
MOV AX,00
MOV AL,NUM1
MOV BL,NUM2
SUB AL,BL
DAS
MOV RESULT,AL
INT 3

ORG 0050H
NUM1 DB 08
NUM2 DB 03
RESULT DB 00
END START

148

3
...
MODEL TINY

...
CODE
MOV AX,@DATA
MOV DS,AX
MOV AX,00
MOV AL,BCD
AND AL,0FH
MOV BL,AL
MOV AL,BCD
AND AL,0F0H
MOV CL,04H
SHL AX,CL
ADD AL,BL
ADD AX, 3030H
MOV ASCII,AX
INT 3

...
4 TWO DIGIT ASCII TO BCD CONVERSION
149


...
STACK 32H

...
DATA
BCD DB ?
Ascii DW 3436H
END

150

3
...
MODEL TINY

...
CODE
MOV AX,@DATA
MOV DS,AX
MOV SI,OFFSET BINARY
MOV AX,DECIMAL
AND AX, 0F000H
MOV CL, 04H
ROL AX, CL
MOV BX, 1000
MUL AX, BX
MOV [SI], DX
ADD [SI], AX
MOV AX, DECIMAL
AND 0F00H
MOV AL, AH
MOV BL, 100
MUL BL
ADD [SI], AX
MOV AX, DECIMAL
AND AX, 00F0H
ROR AL, CL
MOV BL, 10
MUL BL
ADD [SI], AX
MOV AX,DECIMAL
AND AX,000FH
ADD[SI], AX
INT 3


...
6 FOUR DIGIT DECIMAL TO BINARY CONVERSION

...
STACK 32H

...
AX
MOV AL,BH
MOV AH,00
MOV BL,10
DIV BL
MOV BH,AH
SHL AL,CL
MOV AH,00
ADD [SI]
...
DATA
HEX DW 04D2H
DECIMAL

DW ?

END

154

4
...
1 MOVE A BLOCK OF STRING(NON OVERLAPPING )

;BY USING STRING OPERATION AND INSTRUCTION PREFIX
;REGISTERS:AX,BX,CX,DX,SI,DI,ES,DS
;PROCEDURE:NONE
;PORT:NONE

DATA SEGMENT
STRINGA DB 'MICROPROCESSOR'
STRINGB DB 25 DUP(0)
DATA ENDS

CODE SEGMENT
ASSUME CS:CODE, DS:DATA,ES:DATA

START:MOV AX,DATA
MOV DS,AX
MOV ES,AX
MOV BX,0000H
MOV CX,14
LEA SI,STRINGA ;STARTING ADDRESS OF STRING-A
LEA DI,STRINGB ;STARTING ADDRESS OF STRING-B
CLD
REP MOVSB
INT 3H
CODE ENDS
END START

4
...
3 Check whether string is palindrome
data segment
str db 'madan'
156

stre db 5 dup(0)
res db 4 dup(0)
data ends
code segment
assume cs:code,ds:data,es:data
start: mov ax,data
mov ds,ax
mov es,ax
mov ax,0
mov bx,0
lea si,str
lea di,stre
mov cx,0005h
add di,cx
dec di
l1: mov al,[si]
mov [di],al
inc si
dec di
loop l1
cld
mov cx,0005h
mov si,offset str
mov di,offset stre
repe cmpsb
jz l2
mov si, offset res
mov byte ptr [si],'n'
inc si
mov byte ptr[si],'o'
int 3h
l2: mov si,offset res
mov byte ptr[si],'y'
inc si
157

mov byte ptr[si],'e'
inc si
mov byte ptr[si],'s'
int 3h
code ends
end start

158

4
...
5
...
6
...
7
...
1 ALP TO DISPLAY THE GIVEN TWO STRINGS
;REGISTERS:AX,BX,CX,DX,SI,DI,ES,DS
;PROCEDURE:NONE
;PORT:NONE

DATA SEGMENT
MESSAGE1 DB 0AH,0DH,'THIS IS ECM DEPARTMENT',0AH,0DH, "$"
MESSAGE2 DB 0AH,0DH, 'SNIST', 0AH,0DH,"$"
DATA ENDS

CODE SEGMENT
ASSUME DS:DATA,CS:CODE
START:
MOV AX,DATA
MOV DS,AX
MOV DX,OFFSET MESSAGE1
MOV AH,09H
INT 21H
MOV DX,OFFSET MESSAGE2
MOV AH,09H
INT 21H
INT 3H
CODE ENDS
END START

5
...
ALP TO DISPLAY THE STRINGS MATCHING OR NOT
164

;REGISTERS:AX,BX,CX,DX,SI,DI,ES,DS
DATA SEGMENT
STRINGA DB 'MICROPROCESSOR',0,0,0
STRINGB DB 'MICROPROCESSOR'
ACTLEN DW 000EH
MESSAGE1 DB 0AH,0DH,"STRINGS ARE MATCHING",0AH,0DH,"$"
MESSAGE2 DB 0AH,0DH,"STRINGS ARE NOT MATCHING",0AH,0DH,"$"
DATA ENDS
CODE SEGMENT
ASSUME CS:CODE,DS:DATA,ES:DATA
START: MOV AX,DATA
MOV DS,AX
MOV ES,AX
LEA SI,STRINGA
LEA DI,STRINGB
MOV CX,ACTLEN
CLD
REPE CMPSB
JNZ NOTMATCH
MATCH: MOV DX,OFFSET MESSAGE1
MOV AH,09h
INT 21H
INT 3H
NOTMATCH: MOV DX,OFFSET MESSAGE2
MOV AH,09H
INT 21H
INT 3H
CODE ENDS
END START

5
...
1 STEPPER MOTOR INTERFACING

Aim : To interface the stepper motor and rotate it using microprocessor
Circuit description:
The stepper motor interface uses four transistor pairs (SL 100 and 2N3055) darlington pair
configuration
...
The inputs to these transistors are from the 8255 PPI I/O lines of trainer
kit
...
Port pins
pa0-pa3 are connected to stepper motor windings through driver circuit
...
MODEL SMALL

...
CODE
ORG 2000H
MOV AL,80H

;INITIALIZE 8255

MOV DX,0FFE7H
OUT DX,AL
MOV AL,88H

;ALL PORTS ARE OUTPUT

; 0FFE7H INDICATES ADDRESS OF CWR
; PA3-PA0 ARE CONNECTED TO 4 FIELD

GO:MOV DX,0FFE1H
OUT DX,AL
CALL DELAY

; 0FFE1H INDICATE PORT A ADDRESS

; 1=ON AND 0=OFF
; DELAY BETWEEN FIELDS

ROR AL,1
JNZ GO

; ROTATE CONTINOUSLY

INT 3H
DELAY:MOV CX,0FFFH
L1:NOP
LOOP L1
RET
END

6
...
For using this kit we need to connect 26 pin FRC connector
from JP4 of 8086 kit to the Dual DAC kit and connect separate supply for the interface kit
...
3 Interfacing matrix keyboard with 8086
; KEYBOARD INTERFACE
; Assumes the interface is connected over J4 of trainer
; This program displays the value of the pressed key LCD
; This program starts at 0:2000H location

...
STACK 32

...
CODE
MOV AX,@DATA
MOV ES,AX
MOV DS,AX
MOV DX,0FFE6H
; CONFIGURE 8255 IN MODE0
MOV AL,92H
; PORTA AS I/P , PORTC AS O/P
OUT DX,AL
KBDM: CALL KSCAN
MOV AH,00H
MOV SI, OFFSET FNPTR
CALL DWORD PTR[SI]
CALL DELAY
JMP SHORT KBDM
INT 3H
KSCAN PROC NEAR
KS: MOV CL,01H
NEXT: MOV AL,CL
MOV DX,0FFE4H
OUT DX,AL
MOV DX,0FFE0H
IN AL,DX
MOV AH,AL
OR AL,AL
JNZ KEYCODE
CONT: ROL CL,1
CMP CL,08H
JE KS
JMP NEXT
KEYCODE:MOV BL,0H
MOV AL,AH
SHIFT: SHR AL,1
CMP AL,00H
JZ ROW
INC BL
JMP SHIFT
ROW: MOV AL,CL
MOV CL,02H
ROL AL,CL
AND AL,0FBH
171

OR AL,BL
RET
KSCAN ENDP
DELAY PROC NEAR
PUSH CX
MOV CX,0000H
DLY: NOP
LOOP DLY
POP CX
RET
DELAY
ENDP
END

; DELAY ROUTINE

172

6
...
The program assumes that the interface is
; connected over FRC connector J4 of the trainer
...

; The program can be executed in Stand Alone MODE or Serial mode
...
MODEL SMALL

...
CODE
MOV AX,CS

;INITIALISE SEGMENT REG
...


OUT DX,AL
LOOP4: MOV SI,0080H
MOV CL,05H

;INITIALISE POINTER
;SET COUNTER FOR 5 GROUPS
...

2
...

4
...

6
...

8
...

10
...

12
...

14
...

16
...


Operation at 11
...
Their mode is selected by SFR TMOD its format is given below
TMOD REGISTER FORMAT
D7
Gate

D0
C/T

--

M1

M0

Gate

C/T

-

M1

M0

<-------------------- Timer 1------------> <-------------------- Timer 0 ------------>


MODES OF OPERATION

M1

M0

MODE

0

0

13 BIT Timer

0

1

16 BIT Timer

1

0

8 BIT Auto Reload

1

1

2

separate

8

BIT

Timers


INPUT TO TIMER: Fosc/12



INPUT TO COUNTER
o
o



Pin T0 for counter 0
Pin T1 for counter 1

OVERFLOW FLAGS
o
o



TF0
TF1

TCON REGISTER FORMAT

D7

D0

TF1

TR1

TF0

TR0

IE1

o

TF1 & TR1 (Timer 1 flag and Run control)

o

TF0 & TR0 (Timer 0 flag and Run control)

o

IE1,IT1,IE0 & IT0 (Interrupt Control)

SERIAL PORT OF 8051


SCON REGISTER FORMAT
177

IT1

IE0

IT0

D7

D0

SM0

SM1

SM2

REN

TB8

RB8

TI

RI

o

SMO & SM1 (Modes of Operation)

o

SM2 controls microprocessor to microprocessor communication

o

REN (receive enable)

o

TB8 (Transmit bit 8)

o

RB8 (Received bit 8)

o

TI (transmit flag)

o

RI (Received Flag)

MODES OF OPERATION

SM1

SM0

MODE

OPERATION

0

0

0

Shift register, baud rate = f/12

0

1

1

8 BIT UART, baud rate programmable

1

0

2

9 BIT UART, baud rate = f/32, f/64

1

0

3

9 BIT UART, baud rate programmable


BAUD frequency = 2SMOD * Oscillator frequency/(256-TH1)(12*32)
o

SMOD is bit 7 of PCON register

INTERRUPT STRUCTURE OF 8051
There are 5 INTERRUPTS in 8051
i
...
External Interrupts (INT 0 & INT1)
iii
...
P3 port contains multifunction pins
...
Out of 8 bits of
port p1 some can be programmed as inputs and some as outputs for example, higher nibble as output can
be connected to leds & lower nibble as input can be connected to 4 switches
...
The code will
be compiles/assembled linked and then executable file will be converted to HEX file to dump it in
Microcontroller
...
e
...

Atmel‟s FLIP software is used for dumping the code into microcontroller
...
Open KEIL µVision IDE
2
...
Select device for target window will open, click on Atmel to drop down the menu, select
AT89C51ED2 and press ok
...
a51 file
4
...
0592
Check box use on-chip ROM
In output window check the box „Create HEX file‟
5
...
Create your souce file(s) and use the header file
“at89c51xd2
...

6
...

7
...
It creates ...

Program downloading
1
...

2
...
4
...
Go to device option select, select the specific device AT89C51ED2 and press OK
4
...
Go to settings option-> rs232, a window will open make sure that no other application is
using com port
...
In operations flow region, check the options ERASE, BLANK CHECK, PROGRAM,
VERIFY
...
In the right most side of the window check the box BLJB abd set the address of BSB,EB,SBV
as 00,FF and FC respectively and select option „level0‟ in device SSB region
...
After performing above steps click run button wait until the status bar displays finished
...
After programming slide SW2 to RUN position and reset SW1 to execute the program
...
1 4x4 keypad and 7 segment LED interfacing
// Takes a key from key board and displays it on LCD screen
/* connections: CN1 port0 to CN5 keypad
CN2 port1 CN8 7 segment display
CN4 port3 CN7 7 segment display as digit select */
// target Atmel89c51ed2
#include "at89c51xd2
...
kbdisp
...
0 - P2
...
2 Decimal Counter display on seven segment LED display
/* When this routine is executed the counting starts from 000000 to 999999 */
/* on six 7-segment display units(U21 to U26)
...
h>
#include ...
2ms Delay

TCON = 0x00;

// Clearing All Flags

ET0 = 1;

// Enabling Timer0 Interrupt

TR0 = 1;

// Turn ON the Timer0

}

void timer0_isr(void) interrupt 1
{
189

TL0 = 0x00;

// Reloading Value into registers for

every overflow
TH0 = 0xF8;
TF0 = 0;

// Clearing Interrupt Flag

tmr0_flg = 1;
if(twenty_count == 5)//multiplied by 50 for Sec
{
one_sec_flg = 1;
twenty_count = 0x00;
}
else twenty_count += 1;
}

void Display(void)

// To display on 7-segments

{
P0 = 0xF0;

for(i=0;i<6;i++);

if(dig_count == 0x00)

// For Segment U26

{
temp3 = dig1;
P0 = 0x50;
}
else if(dig_count == 0x01) // For Segment U25
{
temp3 = dig2;
P0 = 0x40;
}
else if(dig_count == 0x02) // For Segment U24
{
temp3 = dig3;
P0 = 0x30;
}
190

else if(dig_count == 0x03) // For Segment U23
{
temp3 = dig4;
P0 = 0x20;
}
else if(dig_count == 0x04) // For Segment U22
{
temp3 = dig5;
P0 = 0x10;
}
else if(dig_count == 0x05) // For Segment U21
{
temp3 = dig6;
P0 = 0x00;
}
temp3 &= 0x0F;
temp2 = array_dec[temp3];

// Decoding to 7-segment

P1 = temp2;

// Taking Data Lines for 7-Seg

}

191

6
...

Connections: CN2 port1 to CN15 connector and CN1 port0 connector to CN16 of adc
block
...
Vary pot R42 to gewt different
input voltage values
*/
#include ...
h>
// LCD FUNCTION PROTOTYPE
void lcd_init(void);
void lcd_comm(void);
void lcd_data(void);
void delay(int);
unsigned char temp1;
unsigned char temp2,buf[8];
float adc_temp;
sbit EOC = P0^4;
sbit START_ALE = P0^7;
unsigned char xdata arr1[12]={"ADC O/P = "};
unsigned char xdata arr2[12]={"ADC I/P = "};
unsigned char i,a,temp_hi,temp_low;
unsigned int vtemp1,adc_val;
unsigned char temp_msg[]={" "};
void main ()
{
START_ALE = 0;
lcd_init();
temp1 = 0x80;
position of first line
lcd_comm();

// Display the data from first
// Command Writing

for(i=0;i<10;i++)
{
temp2 = arr1[i];
192

lcd_data();

// Data Writing

}
P1 = 0xff;

// Configure P1 as input to read the ADC o/p
delay(200);
while(1)
{
P0 &= 0xF0;

// Select the as input channel

START_ALE=1;
to start ADC
delay(5);
START_ALE = 0;

// Generate H->L transition on ALE line

do
End of conversion takes place
{
vtemp1=P0;
vtemp1=vtemp1 & 0x10;
} while(vtemp1 == 0x10); // POLL EOC LINE HI TO LOW
do
{
vtemp1=P0;
vtemp1=vtemp1 & 0x10;
} while(vtemp1 == 0x00); // LOW TO HIGH

adc_val = P1;

//

Wait

until

// display adc result on

the data field
adc_temp = (((float)adc_val * 5)/255);
temp_hi=adc_val>>4;
temp_hi=temp_hi & 0x0f;
temp_low=adc_val & 0x0f;
if(temp_hi>9)
received ADC o/p into ASCII code
temp_hi = temp_hi + 0x37;
else
temp_hi = temp_hi + '0';
193

// Convert the

if(temp_low>9)
temp_low = temp_low + 0x37;
else
temp_low = temp_low + '0';
delay(100);
temp_msg[1] = temp_hi ;
temp_msg[2] = temp_low ;

temp1 = 0x8A;
lcd_comm();

// Command Writing

temp2 = temp_hi;
lcd_data();
temp2 = temp_low;
lcd_data();
adc_temp = (int)(adc_temp*100);
i=100;
for(a=0;a<4;a++)
{
buf[a] = adc_temp / i;
adc_temp -= buf[a] * i;
buf[a] += '0';
i /= 10;
}
buf[3] = buf[2];
buf[2] = buf[1];
buf[1] = '
...
C
#include "at89c51xd2
...
h>
//For _nop_();
// LCD FUNCTION PROTOTYPE
extern void lcd_comm(void);
extern void wr_cn(void);
extern void wr_dn(void);
void delay(int);
extern unsigned char temp1;
extern unsigned char temp2;
unsigned char var;
sbit RS = P2^7;
sbit EN = P2^6;
sbit RW = P2^5;
sbit lcd_backlight = P2^4;
void lcd_init(void)
{
temp1 = 0x30;
// D5(P2
...
4)=1
wr_cn();
delay(500);
temp1 = 0x30;
// D5(P2
...
4)=1
wr_cn();
delay(500);
temp1 = 0x30;
wr_cn();
delay(500);

// D5(P2
...
4)=1

temp1 = 0x20;

// Sets the interface data lenght to 4-bits, 1-line, 5X7 dots
195

wr_cn();
delay(500);
temp1 = 0x28;
// Display shift
lcd_comm();
delay(500);
temp1 = 0x0f;
lcd_comm();
delay(500);

// display on,cursor on, cursor blinking

temp1 = 0x06;
lcd_comm();
delay(500);

// Shift cursor right with auto increment

temp1 = 0x80;
lcd_comm();
delay(500);

// Clear display with cursor on first position

temp1 = 0x01;
lcd_comm();
delay(500);
}
// Function to pass commands to LCD
void lcd_comm(void)
{
var = temp1;
temp1 = temp1 & 0xf0;
temp1 = temp1 >> 4;
least position
wr_cn();

//

temp1 = var & 0x0f;
wr_cn();
lcd_backlight = 1;

// Convert the byte into two nibbles
// Shift the most significant nibble to

// Get the least significant nibble

delay(60);
}
// Function to pass data to LCD
void lcd_data(void)
{
196

var = temp2;
temp2 = temp2 & 0xf0; // Convert the byte into two nibbles
temp2 = temp2 >> 4; // Shift the most significant nibble to least position
wr_dn();

//

temp2 = var & 0x0f;
wr_dn();
lcd_backlight = 1;

// Get the least significant nibble

delay(60);
}
// Function to write to command reg of LCD
void wr_cn(void)
{
temp1 = temp1 & 0x7f;
temp1 = temp1 & 0xDF;
temp1 = temp1 | 0x40;

// RS=0
// EN=1

P2 = temp1;
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
temp1 = temp1 & 0xbf;
P2 = temp1;

// EN=0,

}
// Function to write to data reg of LCD
void wr_dn(void)
{
temp2 = temp2 | 0xc0;
temp2 = temp2 & 0xDF;
P2 = temp2;
_nop_();
_nop_();
_nop_();
_nop_();
_nop_();
temp2 = temp2 & 0xbf;
197

//

RS=1,EN=1

//

EN = 0;

P2 = temp2;
}

void delay(int count)
{
int i;
for(i=0;i}

198

6
...

Connection : PORT0 Connected to CN12 of SSR block
...
Also connect port3 CN4 connector to CN18 and short pins 1 &2 of jp4 for
INT0
Output: whenever you run the program the motor rotates in clockwise
...
2/INTO*)
...

************************************************************************
**/
#include "at89c51xd2
...
5 DC motor Interface
// program to test nifc55 dc motor connect port0 to CN12 of SSR block and connect //DC
motor connector to RM9 on board
// by varying off-time and on-time with different values
// user can observe different speed on dc motor
// typically the off values are 30,24,18 & 12
//
on values are 10,16,12 & 28
#include "at89c51xd2
...
6 & P0
...
6 & P0
...
Data transfer instructions
2
...
Bit manipulation instructions
4
...
Program execution transfer instructions
6
...
General purpose byte / word transfer instructions
2
...
Special address transfer instructions
4
...
Copy the contents of a register to another register
...
Copy the contents of a register to memory or vice-versa
...
Load the immediate operand to memory/register
4
...

5
...

6
...

7
...

•

The data transfer instructions generally involve two operands i
...
Source operand and Destination
operand
...
e
...


•

Only 8-bit word can be moved to a 8-bit register/memory or a 16-bit word can be moved to 16-bit
register/memory
...


•

The Source can be a register or a memory location or an immediate data
...


•

In double operand instructions the source and destination cannot refer to memory locations in the
same instruction
...


•

The data transfer instructions (except POPF & SAHF instructions) do not affect any flags of
8086
...


•

The instruction SAHF is used to modify the content of flag register
...


•

General purpose byte or word transfer instructions:
1) MOV
2) PUSH
3) POP
4) XCHG
5) XLAT

•

MOV: Copy byte or word from specified source to specified destination
...
Hence to convert EBCDIC
code in ASCII, the ASCII values of the 0-9 has to be stored say from 2000H, then save 2000H in BX
...


Format : IN ,
Example : IN AL/AX,[DX]
(AL/AX)  ( Port)
the contents of 8-bit port whose address is specified by DX register is transferred to 8-bit accumulator
(AL/AX)
IN AL/AX, addr8

205

(AL/AX)  (addr8)
The contents of 8-bit port whose address is given in the instruction is transferred to accumulator
(AL/AX)

Simple input and output port transfer instructions
•

OUT : copy a byte or word from accumulator to specified port
...

OUT addr8,AL/AX
The contents of accumulator are transferred to the port whose address is specified in the instruction
...


LEA Reg16,Mem
(Reg16)  EA
The 16-bit register is loaded with the effective address (EA) of the memory location specified by the
instruction
...


LDS Reg16,Mem
(Reg16)  (Mem)
(DS)  (Mem+2)
Copies a word from two memory locations into the register specified in the instruction,it then copies a
word from the next two memory locations into the DS register
...


LES Reg16,Mem
(Reg16)  (Mem)
(ES)  (Mem+2)
Copies a word from two memory locations into the register specified in the instruction,it then copies a
word from the next two memory locations into the ES register
...

(AH)  (lower byte of flag register)

The contents of the lower byte of flag register is transferred to the higher byte register of the
accumulator
...

(Lower byte of flag register)  (AH)
The content of the higher byte register of the accumulator is moved to lower byte flag register
...

(sp)  (sp)-2
MAs = (ss) X 1610 + (sp)
(MAs; MAs + 1)  (flags)

the stack pointer is decremented by two and the contents of the 16-bit flag register is pushed to
stack memory to pointed by the SP
...

•

ARITHMETIC INSTRUCTIONS

•

The Arithmetic instructions can be classified into following categories

1
...
Subtraction instructions
3
...
Division instructions
•

The arithmetic operands involve two operands i
...
, source and destination
...
(in comparison the result is used only to update the flags and then it is
discarded)
...


•

In immediate addressing mode arithmetic operations is the data/operand is not matching with the
size of register then the operation will be performed on sign extended data
...


Addition instruction
ADD,ADC,INC,AAA,DAA
ADD: Add
ADD Reg1,Reg2  Reg1 = Reg1
...

the contents of two registers or a immediate data to register or contents of one memory location to
a register contents are added
...

Example: ADD AX,BX
ADC: Add with carry
208

ADC Reg1
...

The ADC instruction affects all conditional flags depending on the result of operation
...
e
...

This instruction affects all conditional flags except the carry flag
...

Immediate data cannot be operand of this instruction
...
The AAA instruction converts the resulting contents of AL to unpacked
decimal digits
...


If the contents of AL is between 0 to 9 and AF = 0, AAA sets the 4 higher order bits of AL to
0
...


If the lower digit of AL is between 0 to 9 and AF = 1, 06 is added to AL, The upper 4 bits of AL
are cleared and AH is incremented by one

209

If the value in the lower nibble is greater than 9 then the AL is
incremented by 06,AH
is incremented by 1,the AF and CF flags are set to 1, and the higher nibble of AL is cleared to 0
...

If the lower nibble is greater than 9, after addition or if AF is set, it will add 06H to the lower
nibble in AL
...

The DAA instruction affects AF,CF,PF and ZF flags
...

Example: AL = 53, CL = 29
ADD AL,CL ; AL <- (AL) + (CL)
AL = 53 + 29 = 7C H
After DAA AL <- 7C + 06 H
AL = 82
Example:
AL = 73 and CL = 29
ADD AL,CL
AL <- AL + CL
AL <- 73 + 29
210

AL <- 9C H
DAA
AL <- 02 and CF = 1
AL  73
CL  + 29
9C
+ 06
A2
+ 60
CF = 1
•

02 in AL

ARITHMETIC
Subtraction instructions

INSTRUCTIONS

Subtraction instructions:
SUB, SBB, DEC, NEG, CMP, AAS, DAS
o

SUB : subtraction

SUB X,Y
X = X – Y, X  destination, Y - source
This instruction subtracts the source operand from the destination operand and the result is stored
in destination
...
The destination operand cannot be an immediate data
...

Example: SUB BX,DX

SBB : Subtract with Borrow
SBB X,Y
211

X = X – Y – BW(CY) X  destination, Y  Source,
BW  Borrow i
...
, Carry flag contents
...


Subtraction with borrow is equivalent to subtracting 1 from the result
(subtraction) operation when the carry flag is set
...


All the flags are affected (conditional flags) by this instruction
...


All the conditional flags except the carry flag are affected depending upon the result

Immediate data cannot be operand of the instruction
...
/Reg
...

For obtaining 2‟s complement,it subtracts the contents of destination from 0(zero)
...

Using NEG instruction if the OF flag is set, it will indicate that the operation was not successfully
completed
...

Example:NEG BX
o

CMP :Compare

CMP X,Y ; X  Destination, Y  Source
This instruction compares the source operand, which may be a
register or an immediate data or memory location, with a destination
operand that may be a register or a memory location
...


destination

The flags are affected depending upon the result of the subtraction
...

CF = 1; when source operand is greater than the destination operand
...


213

The result is in unpacked decimal format
...

Otherwise, the CF and AF are set to 0, the result needs no correction
...

the procedure is similar to the AAA instruction except for subtraction of 06 from AL
...

o

DAS: Decimal adjust after subtraction
DAS

The instruction converts the result of subtraction of two packed BCD numbers to a valid BCD
number
...

If the lower nibble of AL is greater than 9, this instruction will subtract06 from the lower nibble
of AL
...

DAS instruction modifies the AF,CF,SF,PF and ZF flags
...

DAA and DAS instructions are also called packed BCD arithmetic instructions
...


MUL Reg
...

This instruction multiplies an unsigned byte or word by the contents of AL
...

For Byte multiplication the most significant byte will be stored in AH register and least
significant byte is stored in AL register
...

Immediate operand is not allowed in this instruction
...

Example: MUL BL
MUL BX
 IMUL : Signed Multiplication
...

The source can be a general purpose register, memory operand,index register or base register, but
it cannot be an immediate data
...

In case of 32-bit results, the higher order word(MSW) is stored in DX and lower order word is
stored in AX
In case of 16-bit result it will be stored in AX register
...

If AH and DX contains parts of 16-bit and 32-bit result respectively, CF and OF both will be set
...

The unsigned higher bits of the result are filled by sign bit and CF,AF are cleared
...

The AAM instruction follows a multiplication instruction that multiplies two unpacked BCD
operands, i
...
, higher nibbles of the multiplication operands should be „0‟
...

The result of the multiplication will be available in AX
...

MOV AL, 04

; AL  04

MOV BL, 09

; BL  09

MUL BL

; AH:AL  24 H (9 X 4)

AAM ; AH  03
; AL 06
•

ARITHMETIC
Division instructions

INSTRUCTIONS

Division instructions: DIV, IDIV, AAD, CBW, CWD
o

DIV : Unsigned division

DIV ...
It divides an unsigned word or double word by a 16bit or 8-bit operand
...


216

The dividend for 32-bit operation will be in DX:AX register pair (Most significant word in DX
and least significant word in AX)
...

The result of division is for 16-bit number divided by 8-bit number the Quotient will be in AL
register and the remainder will be in AH register similarly for 32-bit number divided by 16-bit number the
Quotient will be in AX register and the remainder will be in DX register
...

 For 16-bit  8-bit
(AL)  (AX)  (reg
...
-8 : 8 – bit register
(AH)  (AX) Mod (reg
...
-16) ; Quotient
(DX)  (DX)(AX) Mod (reg
...
-16 : 16 – bit register
Example: DIV AX/ DIV [BX]
o

IDIV : signed division
IDIV ...
It divides an signed word or double word by a signed
16-bit or 8-bit operand
...

The signed dividend must be in AX for 16-bit operation and the signed divisor may be specified
using any one of the addressing modes except immediate
...

All the flags are undefined for IDIV instruction
...
The sign of remainder will
be same as that of dividend
...

If the result is too big to fit into AL or AX register then Type-0 (divide by zero) interrupt is
generated and the ISR for the Type zero will be executed such that correction steps are taken to
accommodate the result
...


The ASCII adjustment must be made before dividing the two unpacked BCD digits in AX by an
unpacked BCD byte
...

The AAD instruction has to be used before DIV instruction is used in the program
...

o

CBW : Convert signed byte or word

This instruction converts a signed byte to a signed word i
...
, it copies the sign bit of a byte to be
converted to all the bits in the higher byte of the result word
...

CBW does not affect any flags
...

1
...
e
...
If AL = 0xxx xxxx (i
...
, < 80H)
Then AH  0000 0000 (00H)
218

o

CWD : Convert signed word to double word
CWD instruction copies the sign bit of AX to all the bits of DX register
This operation is to be done before signed division
...

CWD does not affect any flags
...

1
...
e
...


If AX = 0xxx xxxx xxxx xxxx (i
...
< 8000H)
then DX  0000 0000 0000 0000 (0000H)
•

Bit Manipulation Instructions

 The Logical group includes instructions for performing AND, OR,
EX-OR, complement, shift and rotate operations on binary data
...

 The Logical instructions except shift and rotate involve two operands i
...
, source and destination
operand
...

 The destination operand can be a register or memory location
...

 In double operand logical instructions, both the source and destination cannot refer to memory
locations in the same instruction
...

 In double operand logical instructions, the source and destination operand should be of same size,
either both the operand size should be byte or word
...


219

 The processor uses the result of logical operations to alter the flags which reflect the status of the
result
...
Logical instructions
2
...
Rotate instructions
 The various logical instructions are
NOT
AND
OR
XOR
TEST
•

Bit
Logical Instructions

Manipulation

Instructions

 NOT : Complement / Negation (Invert each bit of operand)
NOT < Destination>
The NOT instruction inverts each bit (forms the 1‟s complement) of the byte or word at the
specified destination
...

No flags are affected by the NOT instruction
...


220

The result is stored in destination operand
...

The AND operation gives output 1 only when both the inputs are high
...

The result is stored in destination operand
...

The OR operation gives output 1 when any one of the inputs are high
...

The result is stored in destination operand
...

The XOR operation gives output 1 only when both the inputs are dissimilar
...

The source and destination operands are not altered they simply update the flags
...
The
affected flags are OF, CF,SF,ZF and PF
...

The source operand can be a register or a memory location or immediate data
...

But both source and destination cannot be memory location
...

AF will be undefined for TEST instruction
...
/ Mem>
CF  R(MSB) ; R(n+1)  R(n) ; R(LSD)  0

These instructions shift the operand word or byte bit by bit to the left and insert zeros in the
newly introduced least significant bits
...

The operand to be shifted can be either register or memory location contents but cannot be
immediate data
...
The shift operation will considering using
carry flag
...
/ Mem>
CF  R(LSB) ; R(n)  R(n+1) ; R(MSD)  0

These instructions shift the operand word or byte bit by bit to the right and insert zeros in the
newly introduced Most significant bits
...

The number of bits to be shifted if 1 will be specified in the instruction itself if the count is more
than 1 then the count will be in CL register
...

All the flags are affected depending upon the result
...

SAR : Shift Logical Right
223

SAR ...

SAR instruction inserts the most significant bit of the operand in the newly inserted bit positions
...

The number of bits to be shifted if 1 will be specified in the instruction itself if the count is more
than 1 then the count will be in CL register
...

All the flags are affected depending upon the result
...

•

Bit
Rotate Instructions

Manipulation

Rotate instructions
ROL, RCL, ROR, RCR
 ROL : Rotate left without carry
ROL ...

The MSB is pushed into the carry flag as well as into LSB at each operation
...

The PF, SF, and ZF flags are left unchanged in this rotate operation
...

The count will be in instruction if it is 1, and in CL register if greater than 1
...
e
...
/ Mem> ,
R(n+1)  R(n) ; CF  R(MSB) ; R(LSB)  CF

This instruction rotates all the bits in a specified word or byte to the left by the specified count
(bit-wise) including carry
...
The remaining bits are
shifted left subsequently by the specified count positions
...
The operand can be a
register or a memory location
...

 ROR : Rotate right without carry
ROR ...

The LSB is pushed into the carry flag as well as the MSB at each operation
...

The PF, SF, and ZF flags are left unchanged in this rotate operation
...

The count will be in instruction if it is 1, and in CL register if greater than 1
...
e
...
/ Mem> ,
R(n)  R(n + 1) ; R(MSB)  CF ; CF  R(LSB)

MSB
LSB

226

This instruction rotates all the bits in a specified word or byte to the right by the specified count
(bit-wise) excluding carry
...
The remaining bits
are shifted right subsequently by the specified count positions
...
The operand can be a
register or a memory location
...

•

String Instructions

 A string is a sequence of bytes or words i
...
, a series of data bytes or words available in memory
at consecutive locations, to be referred to collectively or individually and is known as byte strings
or word strings
...

 Length of the string
...

 In case of 8085, the strings are referred by using pointers and counter arrangement which are
modified at each iteration, till the required condition for proceeding further is satisfied
...
The pointers are updated i
...
, incrementing and decrementing of the pointers
depending on the status of the DF flag
...
On the other hand, if it is a word
string operation, the index registers are updated by two
...

 The 8086 instruction set includes instructions for string movement, comparison, scanning,
loading and storing
...

 The string instructions end with “S” or “SB” or “SW” , where “S” represents string, “SB”
represents string byte, “SW” represents string word
...
e
...


227

 The string instructions MOVS and CMPS assume that the source operand is in data segment
memory, and the destination is in extra segment memory
...

 The string instruction LODS assumes that the source operand is in data segment memory and the
destination is accumulator
...

 On execution of string instruction depending on DF, SI and DI registers are automatically
updated to point to the next byte / word of the source and destination
...

 The string instructions are categorized as
1
...
String data manipulation instructions
 The Prefix instructions are:
REP
REPE / REPZ
REPNE / REPNZ
 The string data manipulation instructions are :
MOVS / MOVSB / MOVSW
CMPS / CMPSB / CMPSW
SCAS / SCASB / SCASW
LODS / LODSB / LODSW
STOS / STOSB / STOSW
•

String
Prefix instructions

Instructions

 REP : Repeat instruction Prefix
The instruction with REP prefix will be executed repeatedly until the CX register becomes zero(
for each iteration CX is automatically decremented by one)
...

 REPE / REPZ : Repeat when equal or till ZF = 1
...

The repeat operation is terminated if CX = 0 or ZF = 0
...

The instruction with REPNE / REPNZ prefix will be repeated if
each iteration CX is automatically decremented by 1)
...

•

String
String data byte/word manipulation instructions

Instructions

 MOVS / MOVSB / MOVSW: Move string byte or word
One byte or word of a string data stored in data segment is copied into extra segment
...

The CX register is decremented by one for each byte / word movement
...

MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
(MAE)  (MA)
For byte operation
If DF = 0, then (DI)  (DI) + 1 ; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1 ; (SI)  (SI) – 1
For word operation
If DF = 0, then (DI)  (DI) + 2 ; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2 ; (SI)  (SI) - 2
 CMPS / CMPSB / CMPSW: Compare string byte or word

229

Compare one byte or word of a string data stored in data segment with that stored in extra
segment
...

The CX register is decremented by one for each byte / word movement
...

MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
Modify flags  (MA) - (MAE)
If (MA) > (MAE) then CF = 0 ; ZF = 0 ; SF = 0
If (MA) < (MAE) then CF = 1 ; ZF = 0 ; SF = 1
If (MA) = (MAE) then CF = 0 ; ZF = 1 ; SF = 0
 For byte operation
If DF = 0, then (DI)  (DI) + 1 ; (SI)  (SI) + 1
If DF = 1, then (DI)  (DI) - 1 ; (SI)  (SI) – 1
For word operation
If DF = 0, then (DI)  (DI) + 2 ; (SI)  (SI) + 2
If DF = 1, then (DI)  (DI) - 2 ; (SI)  (SI) - 2
 SCAS / SCASB / SCASW: Scan string byte or String word
One byte or word of a string data stored in extra segment is subtracted from the contents of AL /
AX and the result modifies the flags
...

The CX register is decremented by one for each byte / word movement
...

MA = (DS) X 1610 + (SI)
MAE = (ES) X 1610 + (DI)
Modify flags  (AL) - (MAE) / (AX) - (MAE : MAE + 1)

230

If (AL) > (MAE) then CF = 0 ; ZF = 0 ; SF = 0
If (AL) < (MAE) then CF = 1 ; ZF = 0 ; SF = 1
If (AL) = (MAE) then CF = 0 ; ZF = 1 ; SF = 0
For byte operation
If DF = 0, then (DI)  (DI) + 1
If DF = 1, then (DI)  (DI) - 1
For word operation
If DF = 0, then (DI)  (DI) + 2
If DF = 1, then (DI)  (DI) - 2
 LODS / LODSB / LODSW: Load string byte or word into AL register
...

The SI register points to the source string
...

load instruction does not affect any flags
...

One byte or word of a string data stored in AL / AX register is copied or stored as string data into
extra segment
...

The DI register is automatically incremented or decremented depending on the status of DF
...
These instructions control the functioning of the available hardware (programmer
accessible hardware) inside the processor chip
...

 The machine control instructions controls the bus usage and execution
...
It also includes the HLT, NOP, LOCK and ESC instructions which controls the
processor operation
 The Various Flag manipulation instructions are
CLC, CMC, STC, CLD, STD, CLI, STI
 The Various machine control instructions are
WAIT, HLT, NOP, ESC, LOCK
 CLC : Clear Carry
The carry flag is reset to zero i
...
, CF = 0
CF  0
 CMC : Complement the carry
232

The carry Flag is Complemented i
...
, if CF = 0 before CMC then after CMC CF =1 and vice
versa
...
e
...
e
...
e
...
e
...
e
...

IF  1
•

Processor
Machine control instructions

Control

Instructions

 WAIT : Wait for Test input pin to go low or an interrupt signal
This instruction causes the processor to enter into an idle state or wait state and continue to
remain in that state until a signal is asserted on the TEST input pin or until a valid interrupt signal is
received on the INTR or NMI interrupt input pin
...
It returns to the idle state because the address of the
WAIT instruction is the address pushed on to the stack when the 8086 responds to the interrupt request
...

 HLT : Halt Processing
The HLT instruction will cause the 8086 to stop the fetching and execution of the instructions
...
e
...

The only ways to get processor out of Halt state are with an interrupt signal on INTR pin, an
interrupt signal on NMI pin, or a valid reset signal on RESET input
...

The NOP instruction does not affect any flag
...

When hand coding, a NOP can also be used to hold a place in a program for instruction that will
be added later
...
/ Reg
...

As 8086 fetches the instructions bytes, the coprocessor also catches these bytes from the data bus
and puts them in its queue , but treats all the normal 8086 instructions as NOPs and when ESC instruction
is fetched by 8086, the coprocessor decodes the instruction and carries out the action specified by the 6bit code in the instruction
...

For ESC opcode, Mem format the data is accessed by 8087 from memory
For ESC opcode, Mem format the data is accessed by 8087 from 8086 register specified in the
instruction
...

When LOCK prefix is used in an instruction then during execution of this instruction the lock
prefix ensures that the shared system resources are not taken over by other bus masters in the middle of
the critical instruction execution
...
This signal is connected to an external bus controller device, which then prevents any other
processor from taking over the system bus
LOCK affects no flags
...

 Normally a program is executed sequentially( i
...
, the program instructions are executed one after
the other), when a branch instruction is encountered the program execution control is transferred
to the specified destination or target instructions
...

 When the content of IP alone is modified, the program control branches to new memory location
in the same segment
...

 The control transfer instructions do not affect the flags of 8086
...

 In conditional instructions, the status of one or more flags are checked and control transfer takes
place only if the specified condition is satisfied
...

There are two types of CALL instructions:
Intra-segment or near call
Inter-segment or far call
•

Program
execution
Unconditional transfer instructions

transfer

instructions

 A near call refers to calling a procedure stored in the same code segment memory in which main
program( or calling program) resides
...

 While executing near call, the content of IP alone is pushed to stack
...

 Direct near call:
CALL Disp-16
This instruction is near-direct call in which the program control is transferred within the same
segment
...

 CALL Disp-16
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  Disp-16
 In-direct Near CALL
CALL reg
...


236

This instruction is near- indirect call in which the control transfer is within same segment and the
effective address of subroutine / procedure to be called is stored in register or memory
...

CALL reg
...

(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  (reg
...
)
 Direct Far CALL
CALL Addroffset, Addrbase
This instruction is far-direct call in which the program control is transferred to another segment
...

The stack pointer is decremented by 2, the IP is pushed into the stack
...

(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (IP)
(IP)  Addroffset
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (CS)
(IP)  Addrbase
 In-direct Far CALL
CALL Mem
...


237

The offset and segment base address of the procedure to be executed are directly given in the
instruction
...
The stack pointer is again
decremented by 2 and CS is pushed onto the stack and the base address available in memory is loaded
into CS
...
)(offset address)
(SP)  (SP) – 2
MAS = (SS) X 1610 + (SP)
(MAS)  (CS)
(IP)  (Mem
...

 The execution of RET instruction at the end of subroutine or procedure, will pop the contents of
top of the stack to IP in case of near call or to IP and CS in case of far call
...

 Return instruction does not affect any flags
...

1
...
Return within segment adding 16-bit immediate displacement to the SP contents
...
Return inter-segment
4
...

The content of top of stack is transferred to IP and the stack pointer is incremented by two
...
The
content of top of the stack is transferred to IP and the SP is incremented by a value (data-16) specified in
the instruction
...
The content of top of the stack is transferred to IP and the SP is incremented by 2
...

MAS = (SS) X 1610 + (SP)
(IP)  (MAS)
(SP)  (SP) + 2
MAS = (SS) X 1610 + (SP)
(CS)  (MAS)
(SP)  (SP) + 2
 Return from inter-segment call adding immediate data to SP
...
The content of top of the stack is transferred to IP and the SP is incremented by 2
...

MAS = (SS) X 1610 + (SP)
(IP)  (MAS)
(SP)  (SP) + 2
MAS = (SS) X 1610 + (SP)
(CS)  (MAS)
(SP)  (SP) + data-16

 JMP : Unconditional Jump
The unconditional jump instructions does not check for any flag condition
...

In near jump instruction the program control is transferred to new memory location in the same
segment by modifying the content of instruction pointer (IP)
...

 JMP Disp-16 (near jump instruction)
The 16-bit value (Disp-16)given in the instruction is added to instruction pointer (IP)
...

Disp-16  (sign extended) Disp-8
(IP)  (IP) + Disp-16
 JMP reg
...
(near jump instruction)
JMP Reg
...

The 16-bit value stored in the register or memory is added to instruction pointer (IP)
...
)
(IP)  (IP) + (Mem)
 JMP Addroffset, Addrbase (Far jump instruction)
The offset address given in the instruction is loaded in IP and the base address given in the
instruction is loaded in CS register
...

The content of (16-bit) memory is moved into IP and the next word in memory is moved into CS
register
...
)
(CS)  (Mem
...

 Loop instructions are used to execute a group of instructions, a number of times as specified by a
count value stored in CX register
...

 For positive displacement the instructions below the LOOP instruction are executed and for
negative displacement the instructions above the LOOP instruction are executed
...

The effective address of first instruction of the loop is obtained by sign extending the Disp-8 to
16-bit and adding to IP
...
After each execution
CX is decremented by one
...

MOV CX, 20 ; load the no
...

X1 : MOV AL, [BX] ; get the element pointed by BX into AL Reg
...
After
each execution CX is decremented by one
...

MOV CX, 10 ; Count in CX
DEC BX
X1 : INC BX
CMP [BX] , 45H

; compare all array elements with 45H

LOOPE X1
If (CX) = 0 and ZF = 1 on exit then all elements of array are 45H;
If (CX)  0 and ZF = 0 BX pointing to first element  45H in array ;
If (CX) = 0 and ZF =0 then last element of the array is 45 H
...
After
each execution CX is decremented by one
...

 JCXZ : Jump if the CX register is zero
This instruction will cause a jump to a label given in the instruction if the CX register contains all
0‟s
...
This
instruction does not refer to the zero flag when it decides whether to jump or not
...

JCXZ affects no flags
...

 The INT instructions are called Software Interrupts
...

 The procedure executed on Interrupt basis is called Interrupt Service Routine (ISR)
...

Thus 8086 processor has 256 types of software interrupts that can be implemented
...

 In order to execute an ISR, a 16-bit effective address for IP and a 16-bit base address for CS are
needed
...

•

Program
execution
Software Interrupt Instructions

transfer

instructions

 In the reserved locations, the 1st two locations are used to store the effective address(to be loaded
into IP) and the next two locations are used to store the base address(to be loaded into CS
register)
...

 The vector address of an interrupt is obtained by multiplying the type number by 4
...
Each ISR is
terminated by IRET (Interrupt return) instruction
...

 Thus the program control returns back to main program after executing ISR
...


244

 The type number is from 0 to 255
...

 The flags IF and TF are also cleared
...

 The memory location pointed by vector address contain the address of interrupt service
routine
...



(SP)  (SP) – 2
(MAS)  (flags)
(SP)  (SP) –2
(MAS)  (CS)
(SP)  (SP) –2
(MAS)  (IP)
(IP)  (0000 : (Type X 4))
(CS)  ( 0000 : ( Type X 4) + 2)
IF  0; TF  0
For each push operation stack memory is given by
MAS = (SS) X 1610 + (SP)

 The sequence operations for executing INT instruction by 8086:
1
...

2
...

3
...

4
...
EX : For INT 8 the new IP value will be read from address 00020H

245

5
...
Reset both IF and TF flags but other flags are not affected by INT instruction
 INT 3H
 This instruction is a special type of software interrupt which has the single byte code of
CCH
...

 The operations performed by this instruction is same as that of type-3 interrupt
...
e
...
e
...

 INTO
If overflow flag (OF) is 1, then type-4 interrupt is performed
...

(SP)  (SP) – 2
(MAS)  (flags)
(SP)  (SP) –2
(MAS)  (CS)
(SP)  (SP) –2

246

(MAS)  (IP)
(IP)  (00010H)

; 4 X 4 = 16 i
...
10H

(CS)  ( 00012H)

; 16 + 2 = 18 i
...
12H

IF  0; TF  0
MAS = (SS) X 1610 + (SP) for each PUSH operation
...

On execution of this instruction the contents of top of the stack (pointed by SP) are moved
(popped) to IP , CS and Flag registers one by one
After each pop operation the SP is incremented by 2
...

(IP)  (MAS) ; (SP)  (SP) + 2
(CS)  (MAS) ; (SP)  (SP) + 2
(Flags)  (MAS) ; (SP)  (SP) + 2
For each pop operation the stack memory address is calculated as
MAS = (SS) X 1610 + (SP)
•

Program
execution
Conditional Jump Instructions

transfer

instructions

 In a conditional jump instruction one or more flag conditions are checked
...

 All conditional instructions are only near jump (or short jump), hence the contents of CS is not
altered
...
The new value of IP is the effective
address of the instruction where the program control is transferred, if the condition is true
...


247

 When the conditional jump instructions are executed execution control is transferred to the
address specified relatively in the instruction, provide the condition implicit in the opcode is
satisfied, when the condition is not satisfied the execution continues sequentially and the
conditions here indicate the status of the conditional flags in the flag register
...

 As the address has to be specified in the instruction relatively in terms of displacement which
must lie within –80H to 7FH (i
...
–128 to 127) bytes from the address of the branch instruction
...

 As the conditional jump instructions are generally used with congestion with comparison of
numbers the comparison can be between unsigned and as well as between signed numbers
...
The terms greater than and lesser
than refer to signed binary numbers
...

 The term greater than means more positive and the lesser than means more negative
...
No
...


JA / JNBE

CF = 0 AND ZF =0

Jump if above / Jump if
not below or equal
...


JAE / JNB

CF =0

Jump if above or equal /
Jump if not below

3
...


JC

CF = 1

Jump if carry flag (CF) =
1
...


JNC

CF = 0

Jump if no carry i
...
,
CF = 0

6
...


JNE / JNZ

ZF = 0

Jump if not equal/ Jump
if Non zero (ZF = 0)

8
...


JNO

OF = 0

Jump if no over-flow (OF
= 0)

10
...


JNP / JPO

PF = 0

Jump if no parity / Jump
if Odd parity

12
...


JNS

SF = 0

Jump if no sign

14
...


JGE / JNL

SF = OF

Jump if greater than or
equal / Jump if not less
than

16
...


JLE / JNG

SF  OF (OR) ZF Jump if less than or equal
/ Jump if not greater than
=1

 JG / JNLE :

249

Greater means more positive and not less than or equal means not more negative and also not
equal
...
As in signed notation 00000111 is more positive than
11101010 as the second number has MSB = 1 thus negative number
...


250

251

252

253

254

255

COMMON SIGNALS
Name

Function

256

Type

AD – AD
15 0
A /S–A /S
19 6 16 3
BHE /S7
MN / MX
RD

Address/ Data Bus
Address / Status

Bidirectional
3 - state
Output 3 - State

Bus High Enable /
Output
Status
3- State
Minimum /
Input
Maximum Mode
Control
Read Control
Output 3- State

TEST

Wait On Test Control

READY

Wait State Controls

RESET
NMI
INTR
CLK
Vcc
GND

System Reset

Input
Input
Input

Non - Maskable
Interrupt Request
Interrupt Request
System Clock
+ 5V
Input
Ground

Input
Input
Input

Minimum Mode Signals ( MN/ MX = Vcc )
Name

Function
257

Type

HOLD
HLDA

Hold Request
Hold Acknowledge

Input
Output

WR

Write Control

Output,
3-- state

M/IO

Memory or IO Control

Output,
3-StateOutput,
3- State

DT/R

Data Transmit /
Receiver

DEN

Date Enable

Output,
3-State

ALE

Address Latch Enable

Output

INTA

Interrupt Acknowledge

Output

Maximum mode signals ( MN / MX = GND )
Name

Function

258

Type

RQ / GT1, 0
LOCK
S2 – S0
QS1, QS0

Request / Grant Bus
Access Control

Bidirectional

Bus Priority Lock Control

Output,
3- State

Bus Cycle Status

Output,
3- State

Instruction Queue Status

Output

Signal Description of 8086·The Microprocessor 8086 is a 16-bit CPU available in different clock
rates and packaged in a 40 pin CERDIP or plastic package
...
The pins serve a particular function
in minimum mode (single processor mode) and other function in maximum mode configuration
(multiprocessor mode )
...
The first are the signal having
common functions in minimum as well as maximum mode
...

The following pin function descriptions are for the microprocessor 8086 in either
minimum or maximum mode
...


AD0 - AD15 (I/O): Address Data Bus
These lines constitute the time multiplexed memory/IO address during the first clock cycle (T1)
and data during T2, T3 and T4 clock cycles
...
A0 bit is Low during T1 state when a byte is to be transferred on the lower
portion of the bus in memory or I/O operations
...
These lines are active high and float to
tri-state during interrupt acknowledge and local bus "Hold acknowledge"
...
2 shows the
timing of AD0 – AD15 lines to access data and address
...

During I/O operations these lines are low
...

S5: The status of the interrupt enable flag bit is updated at the beginning of each cycle
...

S6: When Low, it indicates that 8086 is in control of the bus
...


260

S3 & S4: Lines are decoded as follows:

A17/S4
0
0
1
1

A16/S3
0
1
0
1

Function
Extra segment access
Stack segment access
Code segment access
Data segment access

After the first clock cycle of an instruction execution, the A17/S4 and A16/S3 pins specify which
segment register generates the segment portion of the 8086 address
...
This feature also provides a degree of protection by
preventing write operations to one segment from erroneously overlapping into another segment
and destroying information in that segment
...
Eight-bit oriented devices tied to the upper half of the bus would normally
261

use BHE to control chip select functions
...
The S7 status
information is available during T2, T3 and T4 states
...
This pin is Low during T1 state for the first interrupt acknowledge
cycle
...
This
signal is active low during T2 and T3 states and the Tw states of any read cycle
...


TEST (I)
TEST pin is examined by the "WAIT" instruction
...

Otherwise the processor waits in an "idle" state
...

INTR (I): Interrupt Request
It is a level triggered input which is sampled during the last clock cycle of each instruction to
determine if the processor should enter into an interrupt acknowledge operation
...
It can be internally
masked by software resetting the interrupt enable bit INTR is internally synchronized
...


262

NMI (I): Non-Muskable Interrupt
An edge triggered input, causes a type-2 interrupt
...
NMI is not maskable internally by software
...
This input is internally synchronized
...
To be recognised, the
signal must be active high for at least four clock cycles, except after power-on which requires a
50 Micro Sec
...
It causes the 8086 to initialize registers DS, SS, ES, IP and flags to all
zeros
...
Upon removal of the RESET signal from the RESET pin,
the 8086 will fetch its next instruction from the 20 bit physical address FFFF0H
...
(Clock generation chip)
...
5 volts for 50 Micro sec
...
5V
...
When the processor
detects the positive-going edge of a pulse on RESET, it terminates all activities until the signal
goes low, at which time it initializes the system as shown in table
...
The READY signal from memory or I/O is synchronized by the 8284 clock
generator to form READY
...
The 8086 READY input is not
synchronized
...

CLK (I): Clock
Clock provides the basic timing for the processor and bus controller
...
Minimum frequency of 2 MHz is required, since
the design of 8086 processors incorporates dynamic cells
...
Since the 8086 does not
have on-chip clock generation
circuitry, and 8284 clock generator chip must be connected to the 8086 clock pin
...
The 8284 clock
generation chip is used to generate READY, RESET and CLK
...
In minimum mode, the 8086 itself
generates all bus control signals
...


Minimum Mode Pins
The following 8 pins function descriptions are for the 8086 in minimum mode; MN/ MX = 1
...


264

M/ IO (O): Status line
This pin is used to distinguish a memory access or an I/O accesses
...
M / IO becomes valid in the T4 state preceding a
bus cycle and remains valid until the final T4 of the cycle
...

WR (O): Write
Indicates that the processor is performing a write memory or write IO cycle, depending on the
state of the M / IO signal
...
It is active LOW,
and floats to 3-state OFF during local bus "hold acknowledge "
...


ALE (O): Address Latch Enable
ALE is provided by the processor to latch the address into the 8282/8283 address latch
...
ALE signal is never floated
...
DT/ R is used to control the
direction of data flow through the transceiver
...

DEN (O): Data Enable
It is provided as an output enable for the 8286/8287 in a minimum system which uses the
transceiver
...
It will be low beginning
with T2 until the middle of T4, while for a write cycle, it is active from the beginning of T2 until
the middle of T4
...


HOLD & HLDA (I/O): Hold and Hold Acknowledge
Hold indicates that another master is requesting a local bus "HOLD"
...
The processor receiving the "HOLD " request will issue HLDA
(HIGH) as an acknowledgement in the middle of the T1-clock cycle
...
After "HOLD" is detected as
being Low, the processor will lower the HLDA and when the processor needs to run another
cycle, it will again drive the local bus and control lines
...
e
...
Only the pins which are unique to maximum mode are described below
...
These are used by the 8288 bus controller to generate all
memory and I/O operation) access control signals
...
These status lines are encoded as shown in table 3
...
QS0,
QS1 provide status to allow external tracking of the internal 8086 instruction queue
...
Queue status allows external devices like In-circuit
Emulators or special instruction set extension co-processors to track the CPU instruction
execution
...
This mechanism
allows (1) A processor to detect execution of a ESCAPE instruction which directs the coprocessor to perform a specific task and (2) An in-circuit Emulator to trap execution of a specific
memory location
...
The LOCK signal is activated by the "LOCK" prefix instruction and remains active
until the completion of the instruction
...

Example: LOCK XCHG reg
...


RQ / GT0 and RQ / GT1 (I/O): Request/Grant
These pins are used by other processors in a multi processor organization
...
Each pin is bi-directional and has an internal pull up resistors
...


MIN AND MAX MODE OPERATION

268

Difference between MAX and MIN mode

Maximum mode
When MN/MX(bar) low 8086 is in maximum
mode
...

So clearly there are multiple processors in the
system
...

In minimum mode 8086 generates INTA(bar),
ALE, DEN(bar), DT/R(bar), M/IO(bar),
HLDA,HOLD and WR(bar) control signals
...
This bus controller
produces MEMRDC, MEMWRC, IORDC,
IOWRC, ALE, DEN, DT/R control signals
...
No bus controller required
...
of producing
the control signals
...


Maximum mode 8086 system

There is only one processor in the system
minimum mode
...


Minimum mode 8086 System

269

Minimum / Maximum: indicates what mode the processor is to operate in
...




A

memory cycle will start within 3 clocks
...


the four rules
with
condition

 Bus Cycle and Time States
 A bus cycle (machine cycle) defines the basic operation that a icroprocessor performs to
communicate with external devices Examples of bus cycles are memory read, memory write,
input/output read and input/output write
...
· Each bus
cycle consists of at least four clock periods: T1, T2, T3, and T4
...
Actions include setting control signals (or S0-S2 status lines) to give the
required values for ALE, DTR IO/M putting a valid address onto the address bus
...
The DEN turns on the data bus buffers to connect the CPU to
the external data bus
...

 T3 - this clock period is provided to allow memory to access the data
...

 T4 - all bus signals are deactivated in preparation for the next clock cycle
...
For the write cycle, the trailing
edge of the WR signal transfers data to the memory or I/O, which activates and write when
WR returns to logic 1 level
...
This is similar to 8085 block diagram with the following
difference
...

Two control signals data transmit/ receive are connected to the direction input of transceiver
(Transmitter/Receiver) and DEN* signal works as enable for this block
...
To validate the data, DEN* signal goes low
...
The
Address/Data bus carries A0 to A15 address information during ALE going high and for the
remaining time it carries data
...

The curved arrows indicate the relationship between valid data and RD* signal
...
The Ready
pin is checked to see whether any peripheral needs more time for data transmission
...
Again DEN* line
goes low to validate data and WR* line goes low, indicating a Write operation
...
The Memory, Address Bus, Data Buses are
shared resources between the two processors
...
The three status outputs S0*, S1*, S2*
from the processor are input to 8788
...
These control signals
perform the same task as the minimum mode operation
...


275

Memory
Maximum Mode

Read

timing

276

in

Memory
Maximum Mode

Write

Timing

277

in

8088 Memory Interface: EPROM: Figure 10-20, Page 356
 8088 starts executing instructions after a hardware reset from FFFF0h
location
...

 The software stored in this section of memory would contain a JMP
instruction at
location FFFF0h that jumps to location F8000h so that the remainder of the
program can
execute
...

 F8000h to FFFFFh is the address range for eight 2732 EPROMs
...
For this purpose we attach the output of
NAND gate to
READY pin of microprocessor
...

RAM: Figure 10-21, Page 358
 It does not require wait stat s for interfacing
...

 Interrupt vectors are often modified by software packages, so it is rather
important to
278

encode this section of the memory with RAM
...
Ending address is 7FFFFh
...

8086 Memory Interface:  8086 has the data bus twice as wide as the bus for 8088
...

 This means that the 16
-bit data bus must be divided into two separate
sections (banks)
that are 8-bit wide so the microprocessor can write to either half (8-bit) or
both halves
(16-bit)
...

 8086 use the BHE and A address bit to select one or both banks of memory
0
used for the data transfer
...

OR
 Separate decoders are used for each bank
...

 In this method low bank and high bank of memory is selected by separate
decoders
...

 The only advantage of this method is to converse energy because only the
bank or
banks are enabled
...

 This technique requires only one decoder to select a 16
-bit wide memory
...

 To generate separate read strobes for each memory bank is unnecessary,
because the
8086 microprocessors read only the byte of data that they used at any given
279

time from
half of the data bus during a read, the microprocessor ignores the 8-bit section
it doesn‟t
need without any conflicts or special problems
...

 A memory system that uses separate write strobes is constructed differently
from
either the 8-bit system (8088) or the system using separate memory banks
...

 D – D7 will be connected to low bank and D8 – D15 to high bank
0

Memory (I/O) address assignment

Each memory chip covers a section of memory address
280

By analyzing the addresses for a single chip, we find:
1) Several most significant bits are in common
...

 Example: 4K * 8-bit chip starting at 10000h
From 10000h to 10FFF
0001 0000 0000 0000 0000
0001 0000 1111 1111 1111
 What if we have a chip containing 4000 bytes?
Then, no such easy break up
...

Difference between 8088 and 8086

281

A0

A1

8-bit
Memory
A19

CS

A0

A1

A19

A0

D0~D7

?

8086 CPU

?

CS

8-bit
Memory

/BHE

8-bit

D8~D15

A19

8-bit

1) What is the supported memory size of 8088? And 8086?
2) 8086 is fully compatible with 8088
...

b) Byte-based memory accesses are the same
...

i
...
See the example:
A word at address A0000h and A0001h
…0000
…0001

ii
...

282

3) Data Bus Interface for 8086
a) Even addressed bytes are accessed on D7~D0
b) Odd addressed bytes are accessed on D15~D8
c) Thus, even addressed words is easily on D15~D0
i
...


A19~A1 will be sent to both even and odd banks
...


Because the even and odd banks needs different values for
A19~A1

ii
...


4) How to support this structure?
A0 = 0

A0 = 1

Byte

Even

Word Even & Odd
Byte

Odd

Word None

a) A0 decides the even bank
b) What for the odd bank? We have /BHE!!!
BHE*
0
0
1
1

A0
0
1
0
1

CS*
Choose both odd and even memory bank
Choose only odd memory bank
Choose only even memory bank
None is chosen

283

8086 - 80386SX 16-bit Memory Interface








These machines differ from the 8088/80188 in several ways:
The data bus is 16-bits wide
...

BHE , Bus High Enable, control signal is added
...


The 16-bit data bus presents a new problem:
o The microprocessor must be able to read and write data to any 16-bit location in
addition to any 8-bit location
...

A separate write signal (strobe) to each bank (which drive WE )
...


284



There does not seem to be a big difference between these methods although the book claims that
there is
...


80386SX 16-bit Memory Interface (Separate Decoders)

Memory Interfaces


See text for Separate Write Strobe scheme plus some examples of the integration of EPROM and
SRAM in a complete system
...




80386DX and 80486 have 32-bit data buses and therefore 4 banks of memory
...


285

o

The Address bits A 0 and A 1 are used within the microprocessor to generate these
signals
...


o

The high clock rates of these processors usually require wait states for memory access
...


Pentium Memory Interface


The Pentium, Pentium Pro, Pentium II and III contain a 64-bit data bus
...

o The write strobes are obtained by combining the bank enable signals ( BEx ) with the
MWTC signal
...


Memory Architecture


In order to build an N-word memory where each word is M bits wide (typically 1, 4 or 8 bits), a
straightforward approach is to stack memory:

286




This approach is not practical
...


Memory Architecture



The vertical and horizontal dimensions are usually very similar, for an aspect ratio of unity
...

Larger memories start to suffer excess delay along bit and word lines
...

o Refreshing occurs automatically during a read or write
...




This special refresh occurs transparently while other memory components operate and is called
transparent refresh or cycle stealing
...




The capacitors are recharged for the selected row by reading the bits out internally and then
writing them back
...
6us (4ms/256)
...

o This allows 19 memory reads/writes per refresh or 5% of the time
...
Interface two 4K X 8 EPROMs and two 4K X 8 RAM chips with 8086
...

First we have to write the memory map fro the problem given
...

Since the first instruction is fetched from FFFF0h after the microprocessor is reset, we will make
that address to be present in EPROM and write the memory map as follows
...

Locations having addresses from FFFFFH to FE000H are allocated to EPROM1 and 2
...
The line which is
differentiating EPROM from RAM if A13
...

Memory
A19 A18 A17 A16

A15 A14 A13 A12

A11 A10

A9 A8

A7

A6 A5

A4

A3

A2 A1

A0

Address
in

1 1 1 1

1 1 1 1

1

1 1 1

1 1 1 1

1 1 1 1

1 1 1 1

1 1

0

0 0 0

0 0 0 0

0 0 0 0

01

Flex
FFFFFH
To
FE000H

290

1 1 1 1

1 1 0 0

1

1 1 1

1 1 1 1

1 1 1 1

1 1 1 1

1 1

0

0 0 0

0 0 0 0

0 0 0 0

1 0

FDFFFH
To
FD000H

Problems on memory interfacing :

...
g
...

The data don‟t go through the microprocessor but the data bus is occupied
...
The DMA transfer requires only
5 clock cycles
...
The transfer
rate is limited by the speed of memory and peripheral devices

Basic process of DMA
For 8088/8086 in minimum mode:
The HOLD and HLDA pins are used to receive and acknowledge the hold request respectively
...
In a DMA operation, the peripheral takes
over bus control temporarily
...

8086 pins (Address, Data, C-trol 3-rd state)
⇒
4) DMA operation starts
5) Upon completion of the DMA operation, the DMA controller asserts the
request/grant pin again to relinquish bus control
...

Sequence of events of a typical DMA process
1) DMA controller asserts one of the request pins, e
...
RQ/GT1 or
RQ/GT0 (RQ/GT0 has higher priority)
2) 8086 completes its current bus cycle and enters into a HOLD state
3) 8086 grants the right of bus control by asserting a grant signal via the
same pin as the request signal
...

Direct Memory Access (DMA)
Basic DMA concept
Direct memory access (DMA) is a feature of modern computer systems that allows certain
hardware subsystems to read/write data to/from memory without microprocessor intervention,
allowing the processor to do other work
...

Typically, the CPU initiates DMA transfer, does other operations while the transfer is in
progress, and receives an interrupt from the DMA controller once the operation is complete
...
There are usually 8 in a computer system
DMA controller: dedicated hardware used for controlling the DMA operation
Single-cycle mode: DMA data transfer is done one byte at a time
Burst-mode: DMA transfer is finished when all data has been moved
DMA pins and timing
297

x86 Interrupt Pins
HOLD: DMA request
...


1

2

3

4

5

6

7

8

9

CLK
HOLD
HLDA

The address, data and control buses are set to high-Z, so the I/O devices can control the system
bus

298

299

General organization of the DMA controller

DMA operation:

300

DMA transfer - signals

301


...

The DMA controller will enable appropriate channel, and ask the CPU to release the bus so
that the DMA may use the bus
...

The CPU detects the HOLD signal, and will complete executing the current instruction
...

The CPU may have to wait (hold cycles)
...

The DMA will then let the device that requested the DMA transfer know that the transfer
is commencing by asserting the -DACK signal
...

Once the data has been transferred, The DMA will de-assert the -DACK2 signal, so that
the FDC knows it must stop placing data on the bus
...
If
none of the channels have their DRQ lines asserted, the DMA controller has completed its
work and will now tri-state the -MEMR, -MEMW, -IOR, -IOW and address signals
...
The CPU sees this, and de-asserts the
HOLDA signal
...

EXAMPLE
Assuming that a DMA initialization has an overhead of 10 cycles, while a CPU transfer to/from
memory requires 4 cycles (no wait states required), compare a DMA and a CPU transfer from
one memory location to another of
One byte of data
A block of 1Kbytes in burst mode
A block of 64Kbytes in burst mode

DMA controller

A DMA controller interfaces with several peripherals that may request DMA
...

Advantages of DMA
•

Fast memory transfer of data

•

CPU and DMA run concurrently under cache mode

•

DMA can trigger an interrupt, which frees the CPU from polling the channel

303

DMA controller commonly used with 8088/8086 is the
8237 programmable device
...

Normally it appears as part of the system controller chip-sets
...
Each channel is dedicated to a specific peripheral device and
capable of addressing a 64 K bytes section of memory
Supplies memory and I/O with control signals and addresses during DMA transfer
4-channels (expandable)
0: DRAM refresh
1: Free
2: Floppy disk controller
3: Free
1
...

ii) The number of bytes to be transferred (called the word count)
...

AEN: Address enable signal
ADSTB: Address strobe
MEMR΄: Memory read output used in DMA read cycle
MEMW΄: Memory write output used in DMA write cycle

305

A 8237 DMA application

8237 registers

306

CAR (Current Address Register): holds the 16-bit memory address used for the DMA transfer
(one for each channel), either incremented or decremented during the operation
CWCR (Current Word Count Register): Programs a channel for the number of bytes (up to 64K)
transferred during a DMA operation

307

BA (Base Address) and WC (Word Count): Used when auto-initialization is selected for a
channel, to reload the CAR and CWCR when DMA is complete
...

RR (Request Register): Used to request DMA transfer via software (memory-to-memory
transfers)

308

8237 registers
MR (Mask Register):
SR (Status Register): Shows the status of each DMA channel
8237 Software commands

Clear First/Last Flip-Flop - This command is executed prior to writing or reading new address
or word count information to the 82C37
...

Set First/Last Flip-Flop - This command will set the flip-flop to select the high byte first on
read and write operations to address and word count registers
...
The
Command, Status, Request, and Temporary registers, and Internal First/Last Flip-Flop and mode
register counter are cleared and the Mask register is set
...

Clear Mask Register - This command clears the mask bits of all four channels, enabling them to
accept DMA requests
...
To read the Mode registers, first execute the Clear Mode Register Counter
command, then do consecutive reads until the desired channel is read
...
The lower two bits on all Mode registers will read as ones
...
Clear the F/L flip-flop with a clear F/L command
311

2
...
Program the LSB and then MSB of the address
4
...

8237 Programming Example
CLEAR_FF EQU 7CH

;F/L CLEAR VALUE

CH0_A

EQU 70H

;CHANNEL 0 ADDRESS

CH1_A

EQU 72H

;CHANNEL 1 ADDRESS

CH1_C

EQU 73H

;CHANNEL 1 COUNT

MODE

EQU 7BH

;MODE

CR

EQU 78H

MASKS
REQ

;COMMAND REGISTER

EQU 7FH
EQU 79H

STATUS

;MASKS

;REQUEST REGISTER

EQU 78H

;STATUS REGISTER

;ES = segment of source and destination
;SI = source address
;DI = destination address
;CX = count
DMA PROC FAR
MOV AL, 0
312

OUT CLEAR_FF, AL

;CLEAR F/L FF

MOV AX, ES

;PROGRAM SOURCE ADDRESS

SHL AX, 4

;SHIFT LEFT SEGMENT

ADD AX, SI

;ADD SOURCE OFFSET

OUT CH0_A, AL

;CHANNEL 0 ADDRESS PROGRAMMING LSB

MOV AL, AH

;ONLY AL ALLOWED IN IN/OUT INSTRUCTIONS

OUT CH0_A, AL

;CHANNEL 0 ADDRESS PROGRAMMING MSB

FIRST

LAST
EXAMPLE (CONTINUED)
MOV AX, ES ;PROGRAM DESTINATION ADDRESS
SHL AX, 4

;SHIFT LEFT SEGMENT

ADD AX, DI ;ADD DESTINATION OFFSET
OUT CH1_A, AL

;CHANNEL 1 ADDRESS PROGRAMMING LSB FIRST

MOV AL, AH

;ONLY AL ALLOWED IN IN/OUT INSTRUCTIONS

OUT CH1_A, AL

;CHANNEL 1 ADDRESS PROGRAMMING MSB FIRST

MOV AX, CX

;PROGRAM COUNT

DEC AX

;ADJUST COUNT

OUT CH1_C, AL

;MOVE TO CHANNEL 1 COUNT

MOV AL, AH
OUT CH1_C, AL
MOV AL, 88H

;PROGRAM MODE

OUT MODE, AL
MOV AL,1

;MEMORY-TO-MEMORY TRANSFER

OUT CR, AL
MOV AL, 0EH

;UNMASK CHANNEL 0
313

OUT MASKS, AL
MOV AL, 4 ;START DMA TRANSFER BY SETTING REQUEST BIT FOR CHANNEL
2
OUT REQ, AL
EXAMPLE :
Draw the decoding circuit for a 8237 located at address 68H – 6FH
Write CR and MR for a block write transfer that occurs from channel 1
What is the Base and word count if the transfer is between logical addresses offsets A010:1600H
and A010:1840H (not including)

Assembly Level Language Programming
 Program – Group of instructions
314

 Programming languages :
o

High level language
...


o

Low level language
...


o

Easy to debug
...


o

Requires move memory space
...


o

Requires Assembler
...


 Features of Low Level Language Programming:
o

Machine friendly and machine dependent
...


o

Lesser Memory space required
...

 Assembly level language program explains about internal data movement
...

 Assembly Level Language Programming Tools:
 Editor:


Program which allows a programmer to create a file containing Assembly
language statements
...

 The program in Editor is stored into a floppy or hard disk as a file
...

 Assembler:
 It is program which translates the mnemonics for instructions to corresponding binary
codes
...

 Object file : (
...


o

The object file is then loaded into memory and run after further processing it
...
LST)
o

It contains assembly language program statements, the binary codes for each instruction
and offset for each instruction
...
e
...


 For generating machine codes from source file the assembler takes two passes:
 First Pass:
 Determines the displacement of named data items, the offset of labels…
...

 Puts the information into symbol table
...

 In order to facilitate programmer to test and troubleshoot program, list file is sent to
printer
...

 After generating object file and list file an linker or locator is used to assign the physical
starting addresses for the segments
...


o

Linker is useful when working with modular program

o

While writing program for an bigger application the ALP will be large, thus it is usually
much more efficient to divide the large program into smaller modules, which can be
written, tested and debugged individually
...


o

Generally the object modules for useful programs can be kept in a library file and linked
with other programs as and when needed
...


o

The linker assigns only relative addresses of the program which makes program relocatable as it can be put any where in memory to run it later
...
EXE extension
...
EXE file is used before debugging it using the debugger
...


 Debugger :
o

Program which allows programmer to load object code of program into system memory,
execute the program and debug it i
...
, trouble shoot it
...


o

Allows to change the contents of registers and memory locations and return to the
program
...


o

Allows a programmer to set a break point at any point in a program
...

317

o

Usually used to test and debug the hardware and software of an external system like
prototype of microprocessor based instruments
...


318

319

•

Machine Level Language Programming

 Generating the machine codes of program manually and execute it
...


o

The chances of error being committed are more at the machine level( in hand-coding and
entering the program byte-by-byte into the system)
...


o

The programs are not understood by every one and the results are not stored in user
friendly form
...

This type of programming is called Assembly level language programming(ALP)
...
The assembler performs
the task of coding
...


o

The chances of error being committed are less because the mnemonics are used instead of
numerical opcodes
...


o

As the mnemonics are purpose suggestive, the debugging is easier
...
Advanced assemblers provide facilities like macros, lists,………
etc making the task of programming much easier
...


o

The results may be stored in a more user-friendly form
...


 Assembly language programming (ALP) explains the way the computer hardware and operating
system work together and also about how the application programs communicate with the
operating system
...

 ALP imposes rules about what is allowed and what not allowed in a program
...

 Assembly language programming is called low level language programming because it is close to
machine language in structure and function
...

 Mnemonic :
Short alphabetic code that literally assists the memory in remembering a CPU instruction
...

 Operand :
An instruction may contain zero, one (or) two operands
...

The choice of operand is usually determined by the addressing mode
...
e
...

 Instruction

Mnemonic + Operand

 Comment :
The beginning of comment is marked by a semi-colon (;) character
...

When a particular line is beginned with a semicolon, then whole line is treated as a
comment
...

 Assembler Directives:
For directing the assembler
...

321

Assembler Directives And Operators
 Assembler Directives:
•
•

Necessary for assembler to assemble efficiently and correctly
...


•

Is an indication to the assembler about the assumed contents in the segment registers
under the various circumstances as the assembly progresses
...


Gives the programmer more control over the exact placement of data and segmentation of
program than high level language program
...


•

Types of different routines and modules

•
•

The required storage for a particular constant or a variable
...


Assembler Directives And Operators

 The hints given to the assembler are:
1) Assembler Directives
2) Operators
 Assembler Directives:
•

The hints in the form of predefined alphabetical strings
...

Thus the directions to the assembler and pseudo operations are known to be Assembler

Directives
...


•

The advantages of labels in assembly language programming are:

1) Program becomes more understandable
...

322

 When the program is written and assembled using assembler, then the assembler decides the
address of each label and substitutes the values for each of the constants and variables, the
machine code for mnemonics and data in the assembly language program
...

 The assembler directives are used to specify start and stop of a program, attach value to variables,
allocate storage locations to input or output data, to define start and end of
Segments/Procedures/Macros………
...

 The assembler directives control the generation of machine code and organization of the
programs but no machine codes are generated for assembler directives
...


•

The operator performs the arithmetic and logical tasks unlike directives that just direct
the assembler to correctly interpret the program, to code it appropriately
...
,Operand ; Comments
(Label)
•

The variable is optional, but if it is present it is assigned the offset of the first byte that is
reserved by the directive
...


 The mnemonic in the statement determines the length of each operand and is one of the
following:
•

DB (Define Byte) : Each operand datum of the label or variable occupies one byte
location in memory
...

323

•

Assembler Directives

 DD (Define Double Word) : Each operand datum is two words long with low-order word
followed by high-order word
...
e
...

 DT(Define Ten Bytes) : Each operand datum is 10 bytes long and is stored starting from the
lowest byte to higher bytes
...
e
...

 The character string can be defined using DW and DD also, but they are rarely used as the bytes
are reversed and also string operands in a DW or DD cannot exceed two characters in length
...

 DUP operator is used along with data size defining mnemonics to duplicate multiple locations
with the specified value in the braces
...

 Types of numbers used in data statements:
 Binary : ex  11100101B
 Negative number is represented in 2‟s complement sign-magnitude form
...

 Decimal : ex  20/ 20D / -20 / -20D
 Any decimal number is represented using a suffix of character „D‟
...

 Hexadecimal : ex: 30H
•

Always any hexadecimal number is represented using a suffix of character „H‟
...


324

•

An decimal data type is converted to equivalent hexadecimal number and then stored in
the memory locations
...

 ASCII : ex: „Array‟
•

An ASCII value is always written in single quotes
...


•

An Alphanumeric character string given in single quotes as ASCII string is case sensitive
...


•

The label appears only in the termination of the main program in a program structure,although all
separately assembled program modules must conclude with an END directive
...


•

Specifically, the address associated with this label is the address that the loader branches to after
the program has been loaded and is ready for execution
...


•

Any statement after an END directive is ignored by the assembler
...


•

The PROC directive follows a name given to the procedure
...

325

 ENDP
The ENDP directive is used along with the name of the procedure to indicate the end of a
procedure to the assembler
...


•

ORG :

ORG Constant Expression
•

The ORG directive causes the next byte to be associated with the byte number expressed
by the constant expression

ORG 1000H
X DW 2002H
[1000H] = 2002H
•

When an program is being assembled by the assembler (data declarations or instruction
statements) an location counter keeps track of how many bytes it is from the start of a
segment at any time
...


 When the directive EVEN is used in data segment then the location counter is simply be
incremented to the next even address is necessary
...
A NOP instruction will be inserted in the location
incremented over
...

Expression_name EQU Expression
 Expression_name: any valid identifier or label

326

 Expression: Have the format of any valid operand or that evaluates to a constant or any valid
mnemonic
...

The use of this directive is just to reduce the recurrence of the numerical values or
constants in a program code
...

Using the EQU directive, even an instruction mnemonic can be assigned with a label
which can then be used in program in place of that mnemonic
...

In order to explain the exact structure of each segment such that variable and label offsets
are assigned by the assembler
 The data,extra data, or stack segment normally has the form:
Segment_name SEGMENT
storage definition directives
allocation and alignment directives
Segment_name ENDS
 A code segment normally has the form of
Segment_name SEGMENT
Instructions and
Instruction-related directives
Segment_name ENDS
 The directives SEGMENT and ENDS defines the starting and ending boundaries of a segment
and the Segment_name is identifier of the segment
...

327

 In addition to specifying boundaries for the assembler to translate the instructions, it must know
the exact correspondence between the segments and the segment registers, which allows the
assembler to check for certain types of errors and inconsistencies i
...
, whether a variable is
defined in the appropriate data or stack segment
...
,Assignment
Where Assignment will be of the form:
Segment_register_name : Segment_name
 It is important to note that the assume directive does not load the segment addresses into the
corresponding segment registers
...

 When an logical segment is set-up, a name is to be given as a label for the segment and the label
cannot have spaces within it, but an underscore can be used
...

 A logical segment is not usually given a physical starting address when it is declared
...

 Additional terms/indicators like PUBLIC,WORD……
...

•

Public: To indicate that this can be used with other segments with same name from other
assembly modules, when the modules are linked together
...


When the assembler starts reading a segment by default the location counter is
automatically set to 0000H, the ORG directive allows programmer to set the location counter to a desired
value at any point in the program
...

 INCLUDE : (Include Source Code From File)
328

Used to tell the assembler to insert a block of source code from the named file into
current source module
...

This directive allows the contents of all the segments to be accessed from the same group
segment base
...

 PUBLIC:
Any label/variable name referred to in other modules must be declared public in the
module in which it is defined
...

 GLOBAL : (Declare symbols as Public/Extern)
The GLOBAL directive is used in the place of a PUBLIC / EXTERN directive
...

 EXTERN :
Used to tell the assembler that the names or labels following the directive are in some
other assembly module
...

 NAME : (Logical Name Of A Module)
The NAME directive is used to assign a name to an assembly language program module
...

The names, if selected to be suggestive, may point out the functions of the different
modules and hence may help in documentation
...
e
...

 NEAR PTR :
This directive indicates that the label following NEAR PTR is in the same segment and
needs only 16-bits i
...
, 2 bytes offset to address it
...

Using the SHORT operator saves 1-byte of memory by telling the assembler that it needs
to reserve only 1-byte for this particular jump
...

 LENGTH :
Returns the number of units assigned to a variable (not available in MASM)
 SIZE :
Same as the LENGTH operator,except that it returns the number of bytes instead of the
number of units
...

 SEG :
Causes the segment address of the variable or label to be inserted as an immediate data or
operand (although the actual insertion is made by the linker)
If the data_seg is assigned to the block of memory beginning at 05000H and opr1 is in
data_seg, then the instruction
MOV BX, SEG opr1 would put 0500 in BX register
...

The assembler determines the number of bytes in the type of the variable,ex: for the word
type variable the data type is 2
...

This operator is usually used to load the offset of a variable into a register so that the
variable can be accessed with one of the indexed addressing modes
...

It is necessary to do so in any instruction where the type of the operand is not clear
...


"The Assembly
Process"

Language

Programming

A generic computer includes hardware concepts and software concepts
...
The software concepts include the code and data memory
...
The languages can be two types high level languages and assembly languages
...
The assembly
programs use the internal registers as the part of the assembly language code
...

Reasons for using Assembly language:






To speed up the operation of the computer
Assembly language will reduce the size of the program compared to machine language program
...

Assembly language program will save the money
...


The programs essential for writing assembly language programs:

Program

Description

Operating system
DOS or Windows operating systems are used for the programming process
...
This is stored on the
Text editor
disk in the format of file with extension
...

Assembler
program

The assembler will take the
...
The machine code is stored in the file with extension
...


Testing program

This program allows the user to test his program under controlled conditions
...


"Programming Tools and Techniques"

Programming
Tools
and
Techniques:
The computer is the sequential circuit that fetches the instruction from the code memory and then decodes it
...
The challenges faced by the beginning
programmer are unfamiliarity with the tools and running of the program
...


332

Learning process for assembly language:





Learn about the architecture of the CPU
...

o how to use the personal computer
o about the operating system
o about the text editor
o how to use the assembler program
...

Continue to write the large programs
...

Store the edited assembly program on the disk
Call the assembler for converting the assembly language program into the computer understandable
language
...

Identify the errors, reedit the program, reassemble the program and again test until get the result
...
Flow chart uses five elements, they are

Symbol

Purpose

Action
box

The action box is used to represent the data moves, math operations or any other instructions
used to denote the program action
...


Decision

the decision symbol used for condition checking the condition outputs either yes or no
...


Line

The line is used for showing the program flow
...
The arrow will show in what direction the
information is passing
...
Each line of the text is nothing but the
instruction to the CPU
...


LABEL:
...
; COMMENT(S)
Labels are used to assign some name to a location in the program
...


Label

The instruction is any one of the coded set that have been defined by the manufacturer of the
8051
...
The syntax of the instruction is shown below
...
operands

Comments

Comments are used for understanding the program in easy manner
...
(semicolon)

OBJECTIVE TYPE QUESTIONS
1
...
Each time the assembler finds
the name in the program, it will replace the name with the
value or symbol you given to that name
...
Example:
MAX EQU 32767
MIN

EQU MAX - 10

LF

EQU 0AH

PROMPT EQU „TYPE YOUR NAME: $‟
Note: (i) No memory is allocated for EQU names
334

(ii) A name defined by EQU may not be redefined later in a program
...
What are directives
Ans: Assembler directive 8086 microprocessor

(a) The DB directive
(b) The DW directive
(c) The DD directive
(d) The STRUCT (or STRUC) and ENDS directives (counted as one)
(e)The EQU Directive
(f)The COMMENT directive
(g)ASSUME
(h) EXTERN
(i) GLOBAL
(j) SEGMENT
(k)OFFSET
(l) PROC
(m)GROUP
(n) INCLUDE

3
...
The instructions which are to be executed are indicated in the source file
335

and the computer goes from one instruction to the next following the instructions from top to
bottom
(as
a
file
is
read
in
sequence
from
top
to
bottom)
...


4
...
g
...

A compiler is a computer program (or set of programs) that transforms source code written in a
programming language (the source language) into another computer language (the target
language, often having a binary form known as object code)
...


5
...
What is a MACRO
Macros are just like procedures, but not really
...
If
you declared a macro and never used it in your code, compiler will simply ignore it
...
inc
is a good example of how macros can be used, this file contains several macros to make coding
easier for you
...
]


ENDM

Some important facts about macros and procedures:
337



When you want to use a procedure you should use CALL instruction, for example:
CALL MyProc



When you want to use a macro, you can just type its name
...
The
control will be returned back to the program by RET instruction
...
The CALL instruction takes about 3 bytes, so the size of the
output executable file grows very insignificantly, no matter how many time the procedure
is used
...
So if you use the same macro 100 times,
the compiler expands the macro 100 times, making the output executable file larger and
larger, each time all instructions of a macro are inserted
...




To pass parameters to macro, you can just type them after the macro name
...




To mark the end of the procedure, you should type the name of the procedure before the
ENDP directive
...
A procedure is ended by giving ___ENDP_________ instruction
8
...
what is a nested procedure?
ans : A procedure which calls another procedure at the same lexical level should not give access to its
variables
...

10
...
e
...

Flags Affected: None
Notes: Pushing and popping of SS and SP are allowed but strongly discouraged
...

Flags Affected: All

push
Push word onto stack
Syntax: push
op16
op16: 16-bit register or memory
Action: Push op16 onto the stack (i
...
, SP = SP - 2 then [SS:SP] = op16)
...


pushf
Push flags onto stack
Syntax: pushf
Action: Push flags onto stack as a word
...
Internal bus is used for connecting _ cpu and registers,___________________
12
...
What is the purpose of RAM
Randomly accessing for read and write operations
14
...
EPROM

stands

for

__electrically

programmable

Read

only

memory_________________________________
16
...
Explain about the assembly directives used in 8086
...
discuss about the complete instruction set of 8086 microprocessor
3
...
Explain about the nested macros
...
What is a procedure? List three methods of passing of parameters to a procedure and give
advantages and disadvantages of each method
...
write an assembly language to find length of a string
7
...
Write an assembly language to arrange some numbers in descending order
9
...
Discuss about the interfacing of memory with 8086
11
...
Explain about the RAM, EPROMS,EEPROMS
13
...
Discuss about the interfacing of EPROM with 8086 microprocessor
15
...

It is used to interface to the keyboard and a parallel printer port in PCs (usually as part of an
integrated chipset)
...


PA3

1

40

PB4

PA2

2

39

PB5

PA1

3

38

PB6

PA0

4

37

PB7

RD

5

36

WR

CS

6

35

RESET

GND

7

34

D0

A1

8

33

D1

340

8255 Block Diagram

Power
Supplies

Bidirectional
Data Bus
D7 - D0

RD
WR
A1
A0

+ 5V Group
GND A
control

Data
bus
buffer

Read/
write
control
logic

Group
A
prot
A
(8)
Group
A
prot C
Upper
(4)

8 - bit
Internal
data bus
Group
B
control

IO
PA7 - PA0

341

IO
PC7 - PC4

Group
A
prot C
Lower
(4)

IO
PC3 - PC0

Group
B
prot
B
(8)

IO
PB7 - PB0

342

82C55 : Pin Layout
8255 – PPI
 The 8255/8255A is a programmable peripheral interface (PPI) device designed for use in
Intel microcomputer systems
...
The functional
configuration of the 8255A is programmed by the systems software so that normally no
external logic is necessary to interface peripheral devices or structures
...
Data is transmitted or received by the buffer upon execution of input or output instructions by
the CPU
...

 Read/Write and Control Logic
The function of this block is to manage all of the Internal and External transfers of both
Data and Control or Status words
...

CS: Chip Select
A low on this input pin enables the communication between the 8255A, and the CPU
...
e
...

WR : Write
Allow on the input pin enables the CPU to write data or control words into the 8255A
...
They are normally connected to the least significant
bits of the address bus (A0 and A1)
...


 Group A and Group B Controls :
The functional configuration of each port is programmed by the systems software i
...
, the CPU
outputs a control word to the 8255A
...


344

Each of the Control blocks (Group A and Group B) accepts commands from the Read/Write
Control Logic, receives control words from the internal data bus and issues the proper commands
to

its

associated

ports
...
All can be configured in a wide variety of
functional characteristics by the system software but each has its own special features and enhances
the power and flexibility of the 8255A
...
One 8 bit data output latch/buffer and one 8-bit data input latch
...
One 8-bit data output latch/buffer and one 8-bit data input buffer
...
One 8-bit data output latch/buffer and one 8-bit data input buffer (no latch for input)
...
Each 4-bit port contains a 4-bit
latch and it can be used for the control signal outputs and status signal inputs in conjunction with
ports A and B
...
BIT SET-RESET MODE (BSR MODE)
2
...
This
feature reduces software requirements in control-based applications
...


Mode 0 Port definition

349

350

INPUT (READ) CYCLE

0
0
0
0

1
1
1
1

0
0
0
0

0
0
1
1

0
1
0
1

PORT A TO DATA BUS
PORT B TO DATA BUS
PORT C TO DATA BUS
CWR TO DATA BUS

OUTPUT (WRITE) CYCLE

1
1
1
1

0
0
0
0

0
0
0
0

0
0
1
1

0
1
0
1

DATA BUS TO PORT A
DATA BUS TO PORT B
DATA BUS TO PORT C
DATA BUS TO CWR
FUNCTION

X
1

X
1

1
0

X
X

X
X

DATA BUS TRISTATED
DATA BUS TRISTATED

MODE - 0 (BASIC I/O MODE)
SALIENT FEATURES OF THIS MODE
1
...

2
...

3
...

4
...
Input ports are not latched
...
A maximum of four ports are available so that overall 16 I/O configurations are possible
...
Two groups - group A and group B are available for strobed data transfer
2
...

3
...
Both the input and
outputs are latched
...
The single 8-bit port in group A is available
...
The 8-bit port is bidirectional and additionally a 5-bit control port is available
...
Three I/O lines are available at port C , PC2-PC0
...
Inputs and outputs are both latched
...


352

After the reset is removed, the 82C55A can remain in the input mode with no additional
initialization required
...

The control word register will contain 9Bh
...

This allows a single 82C55A to service a variety of peripheral devices with a simple
software maintenance routine
...


The modes for Port A and Port B can be separately defined,while Port C is divided into two
portions as required by the Port A and Port B definitions
...
Modes may be combined so that their
functional definition can be “tailored” to almost any I/O structure
...


8255 – PPI
Interrupt Control Functions
When the 82C55A is programmed to operate in mode 1 or mode 2, control signals are
provided that can be used as interrupt request inputs to the CPU
...

This function allows the programmer to enable or disable a CPU interrupt by a
specific I/O device without affecting any other device in the interrupt structure
...


–

8255

PPI

--

Operating

Modes

MODE – 0
Mode 0 (Basic Input/Output)
...
No handshaking is required, data is simply written to or read from a specific port
...
Two 8-bit ports (Port-A and Port-B) and two 4-bit Ports (Port-C Lower and Port-C
Upper) are available
The two 4-bit Ports can be combinedly used as 1 8-bit port
...
Any Port can be used as input port or output port
...
Output ports are latched and input ports are not latched
...
A maximum of 4 ports are available and hence overall 16 I/O configurations are possible
...

This functional configuration provides a means for transferring I/O data to or from a
specified port in conjunction with strobes or “hand shaking” signals
...

Mode 1 Basic Function Definitions:
Two Groups (Group A and Group B)
362

Each group contains one 8-bit port and one 4-bit control/data port
The 8-bit data port can be either input or output
...

The 4-bit port is used for control and status of the 8-bit port
...

IBF (Input Buffer Full F/F)

363

A “high” on this output indicates that the data has been loaded into the input latch: in
essence, and acknowledgment
...

INTR (Interrupt Request)
A “high” on this output can be used to interrupt the CPU when an input device is
requesting service
...
It is
reset by the falling edge of RD
...

INTE A
Controlled by bit set/reset of PC4
...

8255 – Mode-1 – Input Operation
1
...
When STB is LOW the 8255 asserts IBF signal HIGH and at raising edge of STB, the data
is latched to the port and the INTR is set high
...
When INTR goes high the processor is interrupted through NMI input pin to execute a
subroutine for reading the data from the port
...

4
...


364

8255 – PPI -- MODE – 1(Input) – Timing Diagram

365

OBF – (Output Buffer Full F/F)
...

This does not mean valid data is sent out of the port at this time since OBF can go true
before data is available
...


366

To strobe data into the peripheral device, the user must operate the strobe line in a hand
shaking mode
...

ACK – (Acknowledge Input)
...
i
...
, a response from the peripheral device
indicating that it is ready to accept data
...

A “high” on this output can be used to interrupt the CPU when an output device has
accepted data transmitted by the CPU
...
It is reset by the falling edge of WR
...

INTE B
Controlled by Bit Set/Reset of PC2
...
When the port is empty, the processor writes a byte into the port
...
For writing a data to port, the processor asserts WR LOW and then HIGH
...

3
...
If the output device
accepts the data then it sends an acknowledge signal by asserting ACK LOW and then
HIGH
...
When ACK is low, the OBF is asserted high by the 8255
...

5
...

367

8255 – PPI --MODE – 1 – Salient Features
1
...

2
...

3
...
The inputs and outputs
both are latched
...
Out of 8-bits of port-C, PC0-PC2 are used to generate control signals for port-B and PC3PC5 are used to generate control signals for port-A and the lines PC6 & PC7 may be used
as independent data lines
...


369

MODE – 2
Mode 2 (Strobbed Bi-Directional Bus I/O)
...
“Hand
shaking” signals are provided to maintain proper bus flow discipline similar to Mode 1
...

Mode 2 Basic Functional Definitions:
Used in Group A only
One 8-bit, bi-directional bus Port (Port A) and a 5-bit control Port (Port C)
Both inputs and outputs are latched

UNIT-7
INTEL 8051 MICRCONTROLLER

Introduction :
A decade back the process and control operations were totally implemented by

the

Microprocessors only
...
The development is so drastic that we can‟t find any
electronic gadget without the use of a microcontroller
...

What is a Microcontroller?

370

A single chip computer or A CPU with all the peripherals like RAM, ROM, I/O Ports,
Timers , ADCs etc
...
For ex: Motorola‟s 6811, Intel‟s 8051, Zilog‟s Z8 and
PIC 16X etc…
MICROPROCESSORS & MICROCONTROLLERS:

Microprocessor:
A CPU built into a single VLSI chip is called a microprocessor
...
The microprocessor
contains arithmetic and logic unit (ALU), Instruction decoder and control unit, Instruction
register, Program counter (PC), clock circuit (internal or external), reset circuit (internal or
external) and registers
...

For example, Intel 8085 is an 8-bit microprocessor and Intel 8086/8088 a 16-bit microprocessor
...
1

371

Fig
...

Interfacing diagram:

372

MICROCONTROLLER :
A microcontroller is a highly integrated single chip, which consists of on chip CPU (Central
Processing Unit), RAM (Random Access Memory), EPROM/PROM/ROM (Erasable
Programmable Read Only Memory), I/O (input/output) – serial and parallel, timers, interrupt
controller
...
The block diagram of Microcontroller is shown in Fig
...


Fig
...
Block Diagram of a Microcontroller

373

Distinguish between Microprocessor and Microcontroller
S
...


CPU
2

A microprocessor do not contain
onchip I/OPorts, Timers, Memories
etc
...


3

Microprocessors

are

most Microcontrollers are used in small,
commonly used as the CPU in minimum component designs performing
control-oriented applications
...


Microprocessor instruction sets are Microcontrollers
mainly

intended

have

instruction

sets

for catering to catering to the control of inputs and

large volumes of data
...


374

6

Microprocessor

based

system Microcontroller based system design is

design is complex and expensive
7

The

Instruction

set

rather simple and cost effective
of The instruction set of a Microcontroller is

microprocessor is complex with very
large number of instructions
...
For, ex: PIC microcontrollers
have only 35 instructions
...

flag

EVOLUTION OF MICROCONTROLLERS :
The first microcontroller TMS1000 was introduced by Texas Instrumentsin the year
1974
...
This paved the way for the
new revolution in the history of chip design and gave birth to a new entity called
“Microcontroller”
...
Then
followed the most popular controller 8051 in the year 1980 with 4K bytes of ROM,128 Bytes of
RAM , a serial port, two 16-bit Timers , and 32 I/O pins
...
INTEL introduced a 16 bit microcontroller 8096 in the year 1982
...

Microchip, another company has introduced an 8-bit Microcontroller PIC 16C64 in the year
1985
...
MPC 505 is a 32bit RISC controller of Motorola
...

In recent times ARM company (Advanced RISC machines) has developed and introduced 32 bit
controllers for high-end application devices like mobiles , Ipods etc
...


•

Office
–

Telephones, computers, security systems, fax machines, microwave, copier, laser
printer, color printer, paging etc
...

4-bit Microcontrollers: These 4-bit microcontrollers are small size, minimum pin count and
low cost controllers which are widely used for low end applications like LED & LCD display
drivers ,portable battery chargers etc
...
The popular 4-bit
controllers are Renasa M34501 which is a 20 pin DIP chip with 4kB of ROM,256 Bytes of
RAM,2-Counters and 14 I/O Pins
...

8-bit Microcontrollers : These are the most popular and widely used microcontrollers
...
The 8-bit microcontroller has
8-bitinternal bus and the ALU performs all the arithmetic and logical operations on a byte
instruction
...
Other 8-bit microcontrollers are Intel 8031/8052 and
Motorola MC68HC11 and AVR Microcontrollers, Microchip‟s PIC Microcontrollers 12C5XX
,16C5X and 16C505 etc
...
The
internal bus width of 16-bit microcontroller is of 16-bit
...
These
377

are most suitable for programming in Highlevel languages like C or C ++
...


Examples of 16-bit

microcontrollers are Intel 8096 family and Motorola MC68HC12 and MC68332 families, The
performance and computing capability of 16 bit microcontrollers are enhanced with greater
precision as compared to the 8-bit microcontrollers
...
For

EX:PIC32,ARM 7,ARM9 ,SHARP LH79520 ,ATMEL 32 (AVR) ,Texas Instrument‟s –
...
are some of the popular 32-bit microcontrollers
...
They
are given below in tables
...

INTEL MCS 51 Family
On chip RAM

On chip program

(Bytes)

Microcontroller

memory

Timers/Counters

Interrupts

Serial ports

8031

128

None

2

5

1

8032

256

None

3

6

1

8051

128

4K ROM

2

5

1

8052

256

8K ROM

3

6

1

8751

128

4K EPROM

2

5

1

8752

256

8K EPROM

3

6

1

The following table gives the 4-bit microcontrollers from different manufacturers
...


8-Bit Microcontrollers
...
The evolution can be rightly termed as
silent as the impact or application of a microcontroller is not well known to a common user, although
microcontroller technology has undergone significant change since early 1970's
...

Intel 4004
Intel 8048
Intel 8031
Intel 8051
Microchip PIC16C64
Motorola 68HC11
Intel 80C196
Atmel AT89C51
Microchip PIC 16F877

4 bit (2300 PMOS trans, 108 kHz)
8 bit
8 bit (ROM-less)
8 bit (Mask ROM)
8 bit
8 bit (on chip ADC)
16 bit
8 bit (Flash memory)
8 bit (Flash memory + ADC)

1971
1976

...

1982

...


Development of microprocessors (Visible)
Microprocessors have undergone significant evolution over the past four decades
...
Development of some of the microprocessors can be given as follows
...
Microprocessors are primarily used
for computational purpose, whereas microcontrollers find wide application in devices needing real time
processing / control
...
Starting from domestic applications such as in washing
machines, TVs, airconditioners, microcontrollers are used in automobiles, process control industries , cell
381

phones, electrical drives, robotics and in space applications
...
2
...
Early microcontrollers were manufactured using bipolar or NMOS technologies
...
Current drawn by the IC is also reduced considerably from 10mA to a few micro Amperes in
sleep mode(for a microcontroller running typically at a clock speed of 20MHz)
...
Princeton Architecture
Many years ago, in the late 1940's, the US Government asked Harvard and Princeton universities to come up
with a computer architecture to be used in computing distances of Naval artillery shell for defense
applications
...
It is also known as
Von Neumann architecture after the name of the chief scientist of the project in Princeton University John
Von Neumann (1903 - 1957 Born in Budapest, Hungary)
...
Although Princeton architecture was accepted for simplicity and ease of
implementation, Harvard architecture became popular later, due to the parallelism of instruction execution
...
2
...
2
...
For example, the "jump" (or call) instructions takes 2 cycles
...


MICROCONTROLLER

DEVELOPMENT TOOLS:

To develop an assembly language program we need certain program development tools
...
The various development tools required for
Microcontroller programming are explained below
...
Editor : An Editor is a program which allows us to create a file containing the assembly
language statements for the program
...
As we
type the program the

editor stores the ACSII codes for the letters and numbers in successive

RAM locations
...
If we leave out a
program statement an editor will let you move everything down and insert a line
...
This we call it as source file
...

Ex: Sample
...
Assembler : An Assembler is used to translate the assembly language mnemonics into
machine language( i
...
When you run the assembler it reads the source file of your
program from where you have saved it
...
hex
...


385

3
...
Using

high level languages it is easy to manage complex data

structures which are often required for data manipulation
...
Compilers
like Keil ,Ride and IAR workbench are very popular
...
Debugger/Simulator : A debugger is a program which allows

execute the program, and

troubleshoot or debug it
...
We can also change the contents of registers and memory
locations and rerun the program
...
This is called single step
debug
...
If we insert a
break point , the debugger will run the program up to the instruction where the breakpoint is put
and then stop the execution
...
This will help in evaluating the results without committing
any errors
...
The 8051 is based on
an 8-bit CISC core with Harvard architecture
...
It is available as a 40-pin DIP chip and works at
+5 Volts DC
...

SALIENT FEATURES : The salient features of 8051 Microcontroller are








8-bit CPU optimized for control applications
Extensive Boolean processing (Single-bit logic) capabilities
64K Program Memory address space
64K Data Memory address space
4K bytes of on-chip Program Memory
128 bytes of on-chip Data RAM
32 bidirectional and individually addressable i/o lines
386






Two 16-bit timer/counters
Full duplex UART
6-source/5-vector interrupt structure with two priority levels
On-chip clock oscillator










It is a 40 pin dip (dual-in-line) package
...

8051 available in both NMOS & CMOS
...

Eight bit program status word (PSW)
...

FOUR ports, each port having 8-bits
...


ARCHITECTURE & BLOCK DIAGRAM OF 8051 MICROCONTROLLER:
The architecture of the 8051 microcontroller can be understood from the block diagram
...
The block
diagram of 8051 microcontroller is shown in Fig 3
...
It consists of an 8-bit ALU, one 8bit PSW(Program Status Register), A and B registers , one 16-bit Program counter , one 16-bit
Data pointer register(DPTR),128 bytes of RAM and 4kB of ROM and four parallel I/O ports
each of 8-bit width
...
3
...
The ALU is associated with two registers A & B
A and B Registers : The A and B registers are special function registers which hold the results
of many arithmetic and logical operations of 8051
...
By default it is used for all mathematical operations and also data
transfer operations between CPU and any external memory
...

388

MUL AB

:

DIV AB
...

The R registers: The "R" registers are a set of eight registers that are named R0, R1, etc
...
These registers are used as auxillary registers in many operations
...

Program Counter(PC) : 8051 has a 16-bit program counter
...
After execution of one instruction the
program counter is incremented to point to the address of the next instruction to be executed
...
Since the PC is 16-bit width ,8051 can access program addresses from 0000H to
FFFFH ,a total of 6kB of code
...
i
...
When a value is pushed onto the stack, the 8051 first increments the value of SP
and then stores the value at the resulting memory location
...
Since the SP is only 8-bit wide it is incremented or decremented by
two
...
It is also used intrinsically whenever an interrupt is triggered
...
This information may be either data or an address
...
The register used to access the stack is
called the Stack pointer which is an 8-bit register
...
When the
8051 is powered up ,the SP register contains the value 07
...
e the RAM location value 08 is the
first location being used for the stack by the 8051 controller

There are two important instructions to handle this stack
...
The loading of data from CPU registers to the stack is done by PUSH and the
loading of the contents of the stack back into aCPU register is done by POP
...
Now the contents of the SP are incremented by
two and it is 0A
Similarly POP 3 instruction pops the contents of stack into R3 register
...
In any program if we
need more than 24 bytes of stack ,we can change the SP point to RAM locations 30-7F H
...

Data Pointer Register(DPTR) : It is a 16-bit register which is the only user-accessible
...
It is used by a number of commands which
allow the 8051 to access external memory
...
This DPTR can also be used as two
8-registers DPH and DPL
...
In the 8-bit register only 6-bits are used by 8051
...
In the 6-bits four of them are conditional flags
...
These flag bits

indicate some conditions that resulted

after an instruction was executed
...
The meaning of various bits of PSW register is shown
below
...
7

Carry Flag
390

AC

PSW
...
5

Flag 0 available for general purpose
...
4

Register Bank select bit 1

RS0

PSW
...
2

Overflow flag

---

PSW
...
0

Parity flag
...


The selection of the register Banks and their addresses are given below
...
The RAM is also known as Data memory and the ROM is known as program
memory
...
This Code memory holds the
actual 8051 program that is to be executed
...
Code
memory may be found on-chip, as ROM or EPROM
...
The 8051 has only 128 bytes of
Internal RAM but it supports 64kB of external RAM
...
Since the memory is off-chip it is not as flexible
interms of accessing, and is also slower
...
So, here the external memory is
7 times slower
...
So it is the fastest RAM available, and it is also
the most flexible in terms of reading, writing, and modifying it‟s contents
...
The 128 bytes of internal RAM is
organized as below
...
The
default bank register is Bank0
...

(ii) 16 bytes of bit addressable area and
(iii) 80 bytes of general purpose area (Scratch pad memory) as shown in the diagram below
...

392

The 32 bytes of RAM from address 00 H to 1FH are used as working registers organized as four
banks of eight registers each
...
Each register can be addressed
by its name or by its RAM address
...
3: Internal RAM Structure
The lower 32 bytes are divided into 4 separate banks
...

A register bank is selected depending upon two bank select bits in the PSW register
...
In total, 128bits (16X8) are available in bitaddressable area
...
The bit addresses are from 00H (LSB of the first byte in 20H)
to 7FH (MSB of the last byte in 2FH)
...

Internal Data Memory and Special Function Register (SFR) Map

Fig: Internal Data Memory Map
The special function registers (SFRs) are mapped in the upper 128 bytes of internal data memory address
...
Please note
that the upper 128 bytes of data RAM are present only in the 8052 family
...
The SFRs (80H - FFH) are accessed by direct
addressing only
...


394

8051 Register Banks with address

Bit Addressable & Byte Addressable

Example: Find out to which by each of the following bits belongs
...
This ROM is also called program memory or code memory
...
The external ROM is accessed when the EA(active low) pin is connected to ground or
the contents of program counter exceeds 0FFFH
...


Interfacing memories

397

SPECIAL FUNCTION REGISTERS (SFRs) : In 8051 microcontroller there certain registers
which uses the RAM addresses from 80h to FFh and they are meant for certain specific
operations
...
Some of these registers
are bit addressable also
...
In these SFRs some of them are
related to I/O ports (P0,P1,P2 and P3) and some of them are meant for control operations
(TCON,SCON, PCON
...


398

S
...
Some of these registers are bit addressable (they are marked with a * in the diagram
below)
...

Address
F8H
F0H B*
E8H
E0H ACC*
D8H
D0H PSW*
C8H (T2CON)*

(RCAP2L) (RCAP2H) (TL2)

(TH2)

C0H
B8H IP*
B0H P3*
A8H IE*
A0H P2*
98H SCON*

SBUF

90H P1*
88H TCON*

TMOD TL0

TL1

TH0

TH1

80H P0*
SP
DPL
DPH
PCON
It should be noted hat all registers appearing in the first column are bit addressable
...


Processor Status Word (PSW)

Address=D0H

Fi g 5
...
It also stores the bank select bits
(RS1 & RS0) for register bank selection
...
So, it provides the user 32
I/O lines for connecting the microcontroller to the peripherals
...
Upon reset all the ports are output ports
...
e a high bit must be sent to all the port pins
...

Ex: MOV A,#0FFH
MOV P0,A

; A = FF
; make P0 an input port

PORT 0:
Port 0 is an 8-bit I/O port with dual purpose
...
Unlike other ports, Port 0 is not provided with pull-up resistors internally ,so for
PORT0 pull-up resistors of nearly 10k are to be connected externally as shown in the fig
...


Dual role of port 0: Port 0 can also be used as address/data bus(AD0-AD7), allowing it to be
used for both address and data
...
The 8051 multiplexes address and data through port 0 to save the
401

pins
...
When ALE = 0, it provides data D0-D7,
and when ALE =1 it provides address and data with the help of a 74LS373 latch
...
It has no dual application and acts
only as input or output port
...
Upon reset, Port 1 is configured as an output port
...
e a high bit must be sent to all the port
pins
...
For Ex :
403

MOV A, #0FFH ; A=FF HEX
MOV P1,A

;

make P1 an input port by writing 1‟s to all of its pins

404

405

406

Port 2 : Port 2 is also an eight bit parallel port
...
It can be used as input or output
port
...
Upon reset, Port 2 is configured as an output port
...
For ex,
MOV A, #0FFH

; A=FF hex

MOV P2, A

; make P2 an input port by writing all 1‟s to it

Dual role of port 2 : Port2 lines are also associated with the higher order address lines A8-A15
...
But, in 8031based systems, port 2 is used along with P0 to provide the 16-bit address for the external
memory
...
While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to
provide bits A8-A15 of the address
...

PORT 3 : Port3 is also an 8-bit parallel port with dual function
...
The port pins
can be used for I/O operations

as well as for control operations
...
Port 3 also do not need any external pull-up
resistors as they are provided internally similar to the case of Port2 & Port 1
...
If the port is to be used as input port, all the port bits must be
made high by sending FF to the port
...
0 and P3
...
Bits P3
...
3 are meant for external
interrupts
...
4 and P3
...
6 and P3
...
No
1

Port 3 bit
P3
...
1

11

3

P3
...
3

13

5

P3
...
5

15

T1

7

P3
...
7

17

Table: PORT 3 alternate functions

Interrupt Structure: An interrupt is an external or internal event that disturbs the
microcontroller to inform it that a device needs its service
...
Upon receiving
the interrupt signal the Microcontroller , finish current instruction and saves the PC on stack
...
Get pop PC from stack
The 8051 microcontroller has FIVE interrupts in addition to Reset
...



External Interrupt 0: 0003 H



Timer 0 overflow:



External Interrupt 1: 0013 H



Timer 1 overflow:

001B H



Serial Interrupt :

0023 H

000B H

409

Upon reset all Interrupts are disabled & do not respond to the Microcontroller
...
This is done by
an 8-bit register called Interrupt Enable Register (IE)
...
To enable the interrupts this bit must be set High
...


 ET2 : Enable /disable Timer 2 overflow interrupt
...

 ET1 : Enable /disable Timer 1 overflow interrupt
...

 ET0 : Enable /disable Timer 0 overflow interrupt
...
(Top to down)
...

1
...
Timer interrupt0 (TF0)
3
...
Timer interrupt1 (TF1)
5
...
- Interrupt priority register

410

IP
...
6: reserved
IP
...
4: Serial port interrupt priority bit
IP
...
2: External interrupt 1 priority bit
IP
...
0: External interrupt 0 priority bit

TIMERS in 8051 Microcontrollers : The 8051 microcontroller has two 16-bit timers
Timer 0 (T0) and Timer 1(T1) which can be used either to generate accurate time delays or as
event counters
...

TIMER 0 : The Timer 0 is a 16-bit register and can be treated as two 8-bit registers (TL0 &
TH0) and these registers can be accessed similar to any other registers like A,B or R1,R2,R3
etc…
Ex : The instruction Mov TL0,#07 moves the value 07 into lower byte of Timer0
...


TIMER 1 : The Timer 1 is also a 16-bit register and can be treated as two 8-bit registers (TL1
& TH1) and these registers can be accessed similar to any other registers like A,B or R1,R2,R3
etc…
Ex : The instruction MOV TL1,#05 moves the value 05 into lower byte of Timer1
...
In this TMOD register the lower 4-bits are meant for Timer 0 and
the higher 4-bits are meant for Timer1
...
When GATE= 1 ,the timers can
be started / stopped by the external sources
...
When C/T = 0 ,the Timer is used as delay generator and if C/T=1 the timer is used as
an event counter
...

M1,M0 (Mode) : These two bits are the timer mode bits
...
Mode0, Mode1 and Mode2
...

S
...
THx with TLx as 5-bit
prescalar

0

0

0

2

0

1

1

16-bit Timer mode
...
THx contains a value that
is to be loaded into TLx each time it
412

overflows
4

1

1

3

Split timer mode

PIN Diagram of 8051 Microcontroller : The 8051 microcontroller is available as a 40 pin DIP
chip and it works at +5 volts DC
...
e each port occupies 8-pins
...

XTAL1,XTAL2: These two pins are connected to Quartz crystal oscillator which runs the onchip oscillator
...
If we use a source other than the crystal oscillator, it will be
connected to XTAL1 and XTAL2 is left unconnected
...
When a high pulse is applied to
this pin the microcontroller will reset and terminate all activities
...


(External Access): This pin is an active low pin
...
This pin should not be left
unconnected
...
When the
microcontroller is accessing the program code stored in the external ROM ,this pin is connected
to the OE (Output Enable) pin of the ROM
...
When connected to
external memory , port 0 provides both address and data i
...
This ALE pin will demultiplex the address and data bus
...

P0
...
7(AD0-AD7) : The port 0 pins multiplexed with Address/data pins
...

P2
...
7(A8-A15) : The port2 pins are multiplexed with the higher order address pins
...

P1
...
7 :These 8-pins are dedicated for Port1 to perform input or output port operations
...
0- P3
...
There are various methods of denoting the data operands in the instruction
...
They are
1
...
Direct Addressing mode
3
...
Register Indirect addressing mode
5
...
Normally the data
must be preceded by a # sign
...


415

Ex: MOV A , # 27 H

: The data (constant) 27 is moved to the accumulator register

ADD R1 ,#45 H : Add the constant 45 to the contents of the accumulator
MOV DPTR ,# 8245H :Move the data 8245 into the data pointer register
...
The direct addressing mode uses the lower 128 bytes of Internal RAM
and the SFRs
MOV R1, 42H : Move the contents of RAM location 42 into R1 register
MOV 49H,A : Move the contents of the accumulator into the RAM location 49
...

MOV A,R0 : Move the contents of the register R0 to the accumulator
ADD A,R6 :Add the contents of R6 register to the accumulator
MOV P1, R2 : Move the contents of the R2 register into port 1
MOV R5, R2 : This is invalid
...

Register Indirect addressing mode :The addressing mode in which a register is used as a
pointer to the data memory block is known as Register indirect addressing mode
...

Indexed addressing mode : This addressing mode is used in accessing the data elements of
lookup table entries located in program ROM space of 8051
...
Here C denotes code
...

Interfacing of ADC 0804 to 8051 Microcontroller :
ADC 0804

is a single channel analog to digital converter i
...
, it can take only one analog

signal
...
The higher resolution ADC gives smaller step size
...
For an ADC with resolution of 8 bits,
the step size is 19
...
The time taken by the ADC to convert analog data into
digital form depends on the frequency of clock source
...
To use the internal clock a capacitor and resistor are used as shown in the circuit
...
CS(chip select) pin of ADC
is directly connected to ground
...
1, P1
...
2 are connected to the pin WR, RD and INTR
of the ADC respectively
...


417

From the circuit it is clear that the ADC interfaced directly to the microcontroller
...
Port pins P2
...
6 are
used for SOC and EOC operation
...
7
...
This data after conversion to decimal data is displayed on the LCD module
...

MOV P1 , 0FF H ; Make the port1 high and configure port1 as Input port
BACK: CLR P2
...
5

; Generation of SOC pulse
;

LOOP JB P2
...
5

; Enable Read the digital data
418

MOV A ,P1

; Read digital data through Port1

SETB P2
...
The
stepper motor rotates in steps in response to the applied signals
...
It is mainly used for position control
...
There are also steppers called variable reluctance stepper motors that do not have a PM
rotor
...
This type of stepper motor is commonly referred to as a
...
The center tap allows a change of current direction in each of two coils when a winding is
grounded, thereby resulting in a polarity change of the stator
...
Serial data Transfer

and

(ii)
...
In serial communication the data is sent as one bit at a time in a
timed sequence on a single wire
...


Serial Data Transfer
Asynchronous data transfer allows data to be transmitted without the sender having to send a
clock signal to the receiver
...
When a word is given to the UART for
Asynchronous transmissions, a bit called the "Start Bit" is added to the beginning of each word
that is to be transmitted
...

421

Serial data transmission

After the Start Bit, the individual bits of the word of data are sent
...
When the entire data
word has been sent, the transmitter may add a Parity Bit that the transmitter generates
...
Then at least one Stop Bit is
sent by the transmitter
...

Baud rate is a measurement of transmission speed in asynchronous communication , it represents
the number of bits/sec that are actually being sent over the serial link
...

In the Synchronous data transfer method the receiver knows when to “read” the next bit
coming from the sender
...
In
most forms of serial Synchronous communication, if there is no data available at a given time to
transmit, a fill character will be sent instead so that data is always being transmitted
...

Devices that use serial cables for their communication are split into two categories
...
DTE (Data Terminal Equipment)
...

2
...
Example of DCE is modems
...
i
...

422

So, speed of the parallel data transfer is extremely high compared to serial data transfer
...
Hence with in the computer all
data transfer is mainly based on Parallel data transfer
...

Differences between Serial data transfer and Parallel data transfer
S
...

implemented in hardware

5
...


8

The bandwidth of serial wires is much The bandwidth of parallel wires is much
higher
...


9

Serial interface is more flexible to Parallel data transfer mechanism rely on
upgrade , without changing the hardware
hardware resources and hence not
flexible to upgrade
...

frequencies
...


423

SERIAL COMMUNICATION IN 8051 MICROCONTROLLER
The 8051 has two pins for transferring and receiving data by serial communication
...
0 &P3
...
These pins are TTL compatible and hence they require a
line driver to make them RS232 compatible
...
Serial
communication is controlled by an 8-bit register called SCON register,it is a bit addressable
register
...
7

Serial port mode selector

SM1

SCON
...
5

Used for multiprocessor mode communication
(not applicable for 8051)

REN

SCON
...
Set or cleared by making this bit
either 1 or 0 foe enable /disable reception
...
3

9th data bit transmitted in modes 2 and 3

RB8

SCON
...
it is not
used in mode 0 & mode 1
...


TI

SCON
...
0

Receive interrupt flag
...
There are 4 serial
modes
...
4
...
So to receive and transfer data REN must be set to 1
...
This is achieved as below
SETB SCON
...
4

 TI (Transmit interrupt) is the D1 bit of SCON register
...

The TI bit is raised at the beginning of the stop bit
...
When the 8051 receives data
serially ,via RxD, it gets rid of the start and stop bits and places the byte in the SBUF
register
...
RI is raised halfway through the stop bit
...
Serial ports are
controlled by a special chip called UART (Universal Asynchronous Receiver Transmitter)
...
The RS stands for Recommended Standard
...
The length of a data word is variable
...
This RS-232-C is the commonly used standard when data are
transmitted as voltage
...
For the RS-232C, a 25 pin D type connector is used
...
RS-232 standard was first introduced in 1960‟s by Telecommunications
Industry Association(TIA)
...
Because of this ,voltage transistors called line
drivers and line receivers are used to interface TTL logic with RS-232 signals
...
The microcontroller is connected to the PC using
the DB9 connector
...


426

INTERFACING DC MOTOR- 8051
A DC motor runs with the help of Direct Current
...
The DC motor has rotor, stator, field magnet, brushes, shaft, commutator
...
Interfacing the DC
motor directly to 8051 microcontroller is not possible
...
When this current flow into the 8051 microcontroller,
the IC will get damaged
...
The opto-isolator provides additional protection to the microcontroller
...
So,a suitable heat sink must be used
...
0

CLR

P1
...
2

SETB

P2
...
0

JNB

P2
...
1

SETB

P1
...
1

MONITOR

CLOCKWISE

Enable the H-bridge driver

01 is for Counter clockwise

10 is for clockwise

CLR P1
...
It has fast settling time of 100ns
...
It operates at 4
...
The number of
data bit inputs decides the resolution of the DAC since the number of analog output levels is equal to 2″,
where n is the number of data bit inputs
...


428

The interfacing circuit is shown below
...
The reference current is determined by the resistor R1 and the
reference voltage V ref
...
The output (taken from pin number 4 is observed either on a digital multimeter
or on a cathode ray oscilloscope
...
Give the significance of SIM and RIM instruction available in 8085
...
This is a 1 byte instruction and can be used
three different functions as follows
i)to set mask for RST 7
...
5 AND 5
...

ii) to reset RST 7
...

iii)to implement serial I/O operation
...
this is a 1 byte instruction and can be used for the
following three functions
...

ii)to identify pending interrupts
...

Note: draw the register format
2
...

[NOV/DEC 2007]
Carry flag, auxillary carry flag, parity flag, sign flag, zero flag
3
...
[Apr/may
2008]
Interrupts Priority
TRAP
RST 7
...
5
RST 5
...
Compare CALL and PUSH instructions
When CALL is executed the microprocessor automatically stores the 16-bit
address of the instruction next to CALL on the stack
...
When CALL is
executed the stack pointer is decremented by two
...
What is the use of ALE?
The ALE (Address latch enable) is used to latch the lower order address so that it
can be available in T2 and T3 and used for identifying the memory address
...
When ALE goes low the lower order address is latched until the next
ALE
...
Define instruction cycle, machine cycle and T-state
Instruction cycle is defined, as the time required for completing the execution of
an instruction
...
T-state is
defined as one subdivision of the operation performed in one clock period
7
...

A microprocessor is a multipurpose, programmable logic device that reads binary
instructions from a storage device called memory accepts binary data as input and
processes data according to those instructions and provides result as output
...

8
...
The data on which the operation is to be performed is
called as an Operand
9
...
It is an output signal from the processor
...

10
...
It is an integral part of ALU
...
It also temporarily stores the result of the operation performed by the
ALU
...
What is the use of addressing modes, mention the different types
431

The various formats of specifying the operands are called addressing modes, it is
used to access the operands or data
...
What
are
the
various
registers
in
8085?
- Accumulator register, Temporary register, Instruction register, Stack Pointer, Program
Counter are the various registers in 8085
...
In
8085
name
the
16
- Stack pointer and Program counter all have 16 bits
...
What
are
the
various
flags
used
- Sign flag, Zero flag, Auxillary flag, Parity flag, Carry flag
...

What
is
Stack
Pointer?
- Stack pointer is a special purpose 16-bit register in the Microprocessor, which holds the
address of the top of the stack
...
What
is
Program
counter?
- Program counter holds the address of either the first byte of the next instruction to be
fetched for execution or the address of the next byte of a multi byte instruction, which has
not been completely fetched
...
Also Program register keeps the address of the
next instruction
...
Which
Stack
is
used
in
8085?
- LIFO (Last In First Out) stack is used in 8085
...

18
...

19
...


432

20
...
The high
and low are normal logic levels & high impedance state is electrical open circuit
conditions
...


21
...


22
...


23
...

-

TRAP,

RST0,

25
...
5,

What
RST1,

Which
TRAP

RST2,

interrupt
has

Hardware
RST6
...
5,

Software
RST4,
RST5,

has

the
the

interrupts?
INTR
...


highest
highest

priority?
priority
...

Name
5
different
addressing
modes?
- Immediate, Direct, Register, Register indirect, Implied addressing modes
...

-

How
There

many

28
...


8085?
8085
...

-

What
RST

is

the

RST

4
...


30
...


31
...
Printer, LED / LCD display,
CRT
Monitor
are
the
examples
of
output
devices
...

Can
an
RC
circuit
be
used
as
clock
source
for
8085?
- Yes, it can be used, if an accurate clock frequency is not required
...


33
...
Crystal is used as a clock source most of the times
...

-

Which
RST

interrupt
7
...


35
...
So it is a number, which reflects the lossness of
a
circuit
...


36
...
5 & RST 5
...
Give

examples
for
8
8-bit
Processor
16-bit
Processor
32-bit Processor - 80386 / 80486
...
Why
Because

8085
8085

processor
is
processor
has
8

called
an
8
bit
ALU
(Arithmetic

bit
processor?
Logic
Review)
...
Expand
High-density

n-

type

Complimentary

Metal

Oxide

40
...


41
...
5, RST6
...
5 are Maskable interrupts

Silicon

field

speed

effect

depend

Maskable

HCMOS?
transistor
...
What

is
Tri-state
logic?
Three Logic Levels are used and they are High, Low, High impedance state
...
Tri-state logic
has
a
third
line
called
enable
line
...
Give

an

8085

44
...
What

46
...
Which
TRAP

RST1,

interrupts
are classified

are
RST2,

interrupt
has

one
one

are
RST7
...


are
classified
in
as Hardware and Software

Hardware
RST6
...


RST5
...


RST6,

interrupts?
RST7
...


48
...
How
There

50
...
5

addressing
Implied
addressing

RST
is

for
called

in
in

8085?
8085
...


51
...


52
...


is
semi

conductor

device

modes?
modes
...
What
are
the
basic
units
of
microprocessor?
The basic units or blocks of microprocessor are ALU, an array of registers
and control unit
...

What
is
a
bus?
Bus is a group of conducting lines that carries data, address and control
signals
...

Why
data
bus
is
bi-directional?
The microprocessor is to fetch (read) the data from memory or input device
for processing and after processing it has to store (write) the data to memory or output
devices
...

56
...
It is an output signal
from the processor
...

57
...
This cycle
may
consists
of
three
to
six
T-states
...
Define
T-state?
T-state is defined as one subdivision of operation performed in one clock
period
...


59
...
Each instruction cycle of
processor
contains
a
number
of
machine
cycles
...
What
is
fetch
and
execute
cycle?
The instruction cycle is divided in to fetch and execute cycles
...
The execute cycle is executed to
decode the instruction and to perform the work instructed by the instruction
...
What

is

1st
/
2nd
/
3rd
/
4th
generation
processor?
The processor made of PMOS / NMOS / HMOS / HCMOS technology is

called 1st / 2nd / 3rd / 4th generation processor, and it is made up of 4 / 8 / 16 / 32
bits
...
What is a Microprocessor?
Microprocessor is a program-controlled device, which fetches the instructions from memory,
decodes and executes the instructions
...

63
...

64
...

65
...

66
...

67
...
In both the cases it gets incremented automatically one by one as the instruction bytes get
fetched
...

68
...
In this type of Stack the last stored information can be
retrieved first
...
What happens when HLT instruction is executed in processor?
The Micro Processor enters into Halt-State and the buses are tri-stated
...
What is meant by a bus?
A bus is a group of conducting lines that carries data, address & control signals
...
What is Tri-state logic?
Three Logic Levels are used and they are High, Low, High impedance state
...
Tri-state logic has a
third line called enable line
...
In what way interrupts are classified in 8085?
In 8085 the interrupts are classified as Hardware and Software interrupts
...
What are Hardware interrupts?
438

TRAP, RST7
...
5, RST5
...

74
...

75
...


76
...

77
...

78
...
5 is called as TRAP
...
In 8085 which is called as High order / Low order Register?
Flag is called as Low order register & Accumulator is called as High order Register
...
What are input & output devices?
Keyboards, Floppy disk are the examples of input devices
...

81
...

Crystal is used as a clock source most of the times
...
Which interrupt is not level-sensitive in 8085?
RST 7
...

83
...
So it is a number, which reflects the lossness of a circuit
...

439

84
...
5 & RST 5
...

85
...
Similarly 8086 processor has 16
bit ALU
...
What does microprocessor speed depend on?
The processing speed depends on DATA BUS WIDTH
...
Is the address bus unidirectional?
The address bus is unidirectional because the address information is always given by the Micro
Processor to address a memory location of an input / output devices
...
Is the data bus is Bi-directional?
The data bus is Bi-directional because the same bus is used for transfer of data between Micro
Processor and memory or input / output devices in both the direction
...
What is the disadvantage of microprocessor?
It has limitations on the size of data
...

90
...
The primary function of a Latch is data storage
...

91
...


92
...
It is used for temporary storage of data & information
between the main memory and the CPU (center processing unit)
...

440

93
...
It doesn‟t
require special instruction to store in a memory, it stores automatically
...

94
...
What is stack?
Stack is a portion of RAM used for saving the content of Program Counter and general purpose
registers
...
What is Microprocessor? Give the power supply & clock frequency of 8085

A microprocessor is a multipurpose, programmable logic device that reads
binary instructions from a storage device called memory accepts binary data as
input and processes data according to those instructions and provides result as
output
...

97
...

It is used:
i
...

ii
...

iii
...

98
...
It is an integral part of ALU
...
It also temporarily stores the result of the operation performed
by the ALU
...
List the 16 – bit registers of 8085 microprocessor
...

100
...

• B-C register pair
• D-E register pair
• H-L register pair

101
...

SOD (Serial output data line):
It is an output line through which the microprocessor sends output
serial data
...


What is an Opcode?
The part of the instruction that specifies the operation to be performed is
called the operation code or opcode
...


What is the function of IO/M signal in the 8085?
It is a status signal
...
When this signal is low (IO/M = 0) it denotes the
memory related operations
...


104
...


105
...


106
...
Give examples of
the
instructions for each group
...

• Arithmetic group – ADD, SUB, INR
...

• Branch group – JMP, JNZ, CALL
...

107
...


Explain the difference between a JMP instruction and CALL instruction
...
A CALL
instruction leaves information on the stack so that the original pro gram
execution
sequence can b e resumed
...

The IN instruction is used to move data from an I/O port into th e
accumulator
...

The IN & OUT instructions are used only on microprocessor, which use a
separate address space for interfacing
...


What is the difference between the shift and rotate instructions?
A rotate instruction is a closed loop instruction
...
The shift instruction loses the data
that is moved out of the last bit locations
...


How many address lines in a 4096 x 8 EPROM CHIP?
12 address lines
...


Control signals used for DMA operation are ____________
HOLD & HLDA
...
What is meant by Wait State?
This state is used by slow peripheral devices
...
The
microprocessor remains in wait state as long as READY line is low
...


112
...

• DI ( Disable Interrupts )
• EI ( Enable Interrupts )
• RIM ( Read Interrupt Masks )
• SIM ( Set Interrupt Masks )
113
...


114
...


115
...

The 8085 microprocessor has five interrupt inputs
...
5, RST 6
...
5, and INTR
...

If two or more interrupts go high at the same time, the 8085 will service
them on priority basis
...
5,
RST 6
...
5
...

Interrupts
TRAP
RST 7
...
5
RST 5
...


What is a microcomputer?
A computer that is designed using a microprocessor as its CPU is called
microcomputer
...

•
•
•
•
•
•
118
...
Steps involved to fetch a byte in 8085
i
...
The control unit sends the control signal RD to enable the memory
chip
iii
...
The byte is placed in the instruction decoder of the microprocessor and
the task is carried out according to the instruction
120
...
5, RST6
...
5
and TRAP

444

121
...
To
perform these operations the microprocessor should
• Be able to select the chip
• Identify the register
• Enable the appropriate buffer

122
...
Machine cycle is defined as the time required completing one
operation of accessing memory, I/O or acknowledging an external request
...
What is an instruction?
An instruction is a binary pattern entered through an input device to
command the microprocessor to perform that specific function
124
...
During T1 the ALE
goes high, the latch is transparent ie, the output changes according to the input
data, so the output of the latch is the lower order address
...

125
...
They are
• Opcode fetch
• Memory read
• Memory write
• I/O read
• I/O write
• Interrupt acknowledge
• Bus idle
126
...
READY is used to delay the
microprocessor read or write cycles until a slow responding peripheral is ready to
send or accept data
...
Mention the categories of instruction and give two examples for each
category
The instructions of 8085 can be categorized into the following five
• Data transfer MOV Rd, Rs STA 16-bit
445

•
•
•
•

Arithmetic ADD R DCR M
Logical XRI 8-bit RAR
Branching JNZ CALL 16-bit
Machine control HLT NOP

128
...
STA copies the data byte from the accumulator in
the memory location specified by 16-bit address
...

129
...
What is the use of addressing modes, mention the different types
The various formats of specifying the operands are called addressing modes, it is
used to
access the operands or data
...
What is the use of bi-directional buffers?
It is used to increase the driving capacity of the data bus
...

132
...
Reg Temp
...
Define stack and explain stack related instructions
The stack is a group o f memory locations in the R/W memory that is used
for the temporary storage of binary information during the execution of the
program
...
Why do we use XRA A instruction
The XRA A instruction is used to clear the contents of the Accumulator
and store the value 00H
...
Compare CALL and PUSH instructions
CALL
PUSH
When CALL is executed the
The programmer uses the instruction
microprocessor automatically stores the
PUSH to save the contents of the register
16-bit address of the instruction next to
pair on the stack
CALL on the stack
When CALL is executed the stack pointer
When PUSH is executed the stack
is decremented by two
pointer register is decremented by two
136
...
Microcomputer is
a computer that is designed using microprocessor as its CPU
...

137
...
The 8085
flags are S-Sign flag, Z-Zero flag, AC-Auxiliary carry flag, P-Parity flag, CYCarry flag
D7 D6 D5 D4 D3 D2 D1 D0
S
Z
AC
P CY
138
...
For example MVI A, Data, the second byte is
always considered as data
...

139
...
What is assembler
The assembler translates the assembly language program text which is given as input
to the assembler to their binary equivalents known as object code
...
The assembler checks
for
syntax errors & displays them before giving the object code
...
What is loader
The loader copies the program into the computer‟s main memory at
load time and begins the program execution at execution time
...
What is linker
A linker is a program used to join together several object files into one large object
file
...
Each module is individually written, tested & debugged
...

143
...
The format is ALIGN number where number can be 2, 4,
8
or 16
...

The ASSUME directive assigns a logical segment to a physical segment at any given
time
...
Example ASSUME CS: code, DS: data, SS: stack
144
...
The GROUP
directive
collects them under a single name so they can reside in a single segment, usually a
data
segment
...
Seg-name
PTR is used to assign a specific type to a variable or a label
...

145
...
It initializes memory model
before defining any segment
...


8086 :
1
...
They are
1
...
Data Segment (DS) register
3
...
Extra Segment (ES) register
The code segment register gives the segment address of the current code segment
...

The stack segment registers points out the address of the current stack
...

2
...
This technique is known as
pipelining
...

3
...
While the CPU is executing a
program an interrupt breaks the normal sequence of execution of instructions & diverts
its execution to some other program
...

4
...
The macro assembler generates the code in the
program each time where the macro is called
...
Creating macro is similar to creating new opcodes that can be used in the
program
INIT MACRO
MOV AX, data
MOV DS
MOV ES, AX
ENDM
5
...
[Nov/Dec 2009]
It indicates the status of the accumulator
...

They are,
 AF - Auxiliary Carry Flag
 CF - Carry Flag
 OF - Overflow Flag
 SF - Sign Flag
 PF - Parity Flag
 ZF - Zero Flag
6
...

For large programs several small modules are linked together
...
The PUBLIC directive is used
to tell the assembler that a specified name or label will be accessed from other modules
...
What are the two modes of operations present in 8086?
i
...
Maximum mode (or) Multiprocessor system
8
...
If the
system bus is given to a processor then the LOCK signal is made low
...
After the use of the
system bus again the LOCK signal is made high
...

9
...
One set for even bank
and another for odd bank
...
The even memory bank is selected by address
line A0 and odd memory bank is selected by control signal BHE
...


10
...

IRET-Interrupt Return: this instruction is used to terminate an interrupt service
procedure and transfer the program control back to main program
...
Explain the process control instructions
STC – It sets the carry flag & does not affect any other flag
CLC – it resets the carry flag to zero &does not affect any other flag
CMC – It complements the carry flag & does not affect any other flag
STD – It sets the direction flag to 1 so that SI and/or DI can be decremented
automatically after execution of string instruction & does not affect other flags
CLD – It resets the direction flag to 0 so that SI and/or DI can be incremented
automatically after execution of string instruction & does not affect other flags
STI – Sets the interrupt flag to 1
...

CLI – Resets the interrupt flagto0
...


12
...
The two
processors in a closely coupled system may communicate using a common system bus or
common memory
...
What are loosely coupled systems?
In loosely coupled systems each CPU may have its own bus control logic
...
The loosely
coupled system configuration like LAN & WAN can be spreaded over a large area
...
Write some advantages of loosely coupled systems over tightly coupled systems
 More number of CPUs can be added in loosely coupled systems to improve the
system performance
...

 A fault in a single module does not lead to a complete system breakdown
...

15
...

 They are less portable and more expensive due to the additional hardware and the
communication media requirement
...
What are the multi microprocessor configuration methods
...
What is meant by Daisy chaining method?
It does not require any priority resolving network, rather the priorities of all the
devices are essentially assumed to be in sequence
...
The
controller sends a bus grant signal, in response to the request, if the busy signal is
inactive when the bus is free
...
The master then receives the grant signal,
activates the busy line and gains the control of the bus
...

18
...
The busy line is common for all the masters
...
This is quite fast, because each of the masters can independently
communicate with the controller
...
What is meant by polling?
452

In polling schemes, a set of address lines is driven by the controller to address
each of the masters in sequence
...
If the generated address matches
with that of the requesting masters, the controller activates the BUSY line
...
Name the data types of 8087
...
Explain numeric processor 8087
...

It supports 16, 32, 64-bit integers 32, 64, 80-bit floating point and 16 digit BCD data
types
...
What are the functional units available in 8087?
CU-control unit
NEU - Numeric execution unit
...
Name the three modes used by the DMA processor to transfer data? [NOV/DEC
2006]
Signal transfer mode (cycling stealing mode)
Block transfer mode
Demand transfer mode
24
...
[NOV/DEC 2006]
Mode 0:interrupt on terminal count
Mode 1:hardware re -triggerable one-shot
Mode 2 :rate generator
Mode3:square wave rate generator
Mode 4:software triggered strobe
453

8253 programmable interval

Mode 5:hardware triggered strobe
25
...



Each group contains one 8-bit data I/O port and one 4-bit control/data
port
...
The inputs
and outputs both are latched
...
The lines
PC6, PC7 may be used as independent data lines
...
What is memory mapping?
The assignment of memory addresses to various registers in a memory chip is
called as memory mapping
...
What is key bouncing?
Mechanical switches are used as keys in most of the keyboards
...
Even though a key is actuated once, it will appear to have been actuated
several times
...

What are the different types of methods used for data transmission?
The data transmission between two points involves unidirectional or bi-directional
transmission of meaningful digital data through a medium
...
For example, a computer (CPU is received by the computer (i
...
However, it is not possible to transmit data from the computer
to terminal and from terminal to the computer simultaneously
...
What are the various programmed data transfer methods?
i) Synchronous data transfer
ii) Asynchronous data transfer
iii) Interrupt driven data transfer

454

29
...
What is an USART?
USART stands for universal synchronous/Asynchronous Receiver/Transmitter
...


31
...
This 16bit register is used for ascertaining that the data transfer through a DMA channel ceases
or stops after the required number of DMA cycles
...
Define HRQ?
The hold request output requests the access of the system bus
...
In cascade mode, this pin of a
slave is connected with a DRQ input line of the master 8257,while that of the master is
connected with HOLD input of the CPU
...
What
5
34
...
The address bus is unidirectional because the address information is always given by the Micro
Processor to address a memory location of an input / output devices
...

35
...
Most Microprocessor does not support floating-point
operations
...
What is the difference between primary & secondary storage device?
In primary storage device the storage capacity is limited
...
In secondary
storage device the storage capacity is larger
...
Primary devices are:
RAM
/
ROM
...

37
...

455

Dynamic RAM: Refreshed periodically, 3 to 4 transistors are required to form one memory cell,
Information is stored as a charge in the gate to substrate capacitance
...
What
is
an
interrupt?
Interrupt is a signal send by external device to the processor so as to request the processor to
perform a particular work
...
What
are
the
different
types
of
interrupts?
Maskable
and
Non-maskable
interrupts
...
What

is
cache
memory?
Cache memory is a small high-speed memory
...
The cache memory
is
only
in
RAM
...
Expand
Direct

DMA?
Access

Memory

42
...
Read / Write memory, High Speed, Volatile Memory
...
What
Nonvolatile

Read

Access

is
Memory,

also

called

Flash

NV-RAM?
memory
...
What

is
a
flag?
Flag is a flip-flop used to store the information about the status of a processor and the status of
the
instruction
executed
most
recently

45
...


46
...


47
...
disabled) is known as Non-Maskable interrupt
...
Which

interrupts
are
generally
used
for
critical
events?
Non-Maskable interrupts are used in critical events
...


456

49
...


50
...


51
...
In this type of Stack the first stored information is
retrieved first
...
Where
does
CPU
Enhanced
mode
originate
from?
Intel‟s 80386 was the first 32-bit processor, and since the company had to backwardsupport the 8086
...


53
...


are

there

in

a

byte?

54
...

Address bus: This is used to carry the Address to the memory to fetch either Instruction
or
Data
...

Control bus : This is used to carry the Control signals like RD/WR, Select etc
...
What
is
the
Maximum
clock
5 Mhz is the Maximum clock frequency in 8086
...
What
are
the
different
functional
units
in
8086?
Bus Interface Unit and Execution unit, are the two different functional units in 8086
...
What
are
the
various
segment
Code, Data, Stack, Extra Segment registers in 8086
...
What
does
EU
do?
Execution Unit receives program instruction codes and data from BIU, executes these
instructions and store the result in general registers
...
Which
Stack
is
used
in
8086?
k
is
used
in
8086?
FIFO (First In First Out) stack is used in 8086
...


60
...


61
...


62
...

63
...

64
...
disabled) is known as Non-Maskable
interrupt
...
What is the Maximum clock frequency in 8086?
5 Mhz is the Maximum clock frequency in 8086
...
What is SIM and RIM instructions?
SIM is Set Interrupt Mask
...
RIM is Read Interrupt
Mask
...

67
...

68
...


69
...

70
...

71
...

72
...

73
...

74
...
Immediate addressing mode
b
...
Register addressing mode
459

d
...
Indexed addressing mode
f
...
Based indexed addressing mode
h
...
Intra segment direct mode
j
...
Inter segment direct mode
l
...
What are the types of instructions in instruction set of 8086?







Data copy / Transfer instructions
Arithmetic and Logical instructions
Branch instructions
Machine control instructions
Flag manipulation instructions
String instructions

76
...
Define assembler directives?
There are some instructions in the assembly language program which are not a part of
processor instruction set
...

78
...
Define instruction pipelining?

460

The 8086 architecture has a 6 byte instruction queue, that prefetches the instructions from
memory and stores the instructions in the queue
...

This scheme is known as instruction pipelining
...
State the operation of minimum mode 8086 system?
The 8086 microprocessor can be operated in minimum mode by connecting
MN /
MX pin to logic1
...

There is only a single microprocessor in minimum mode system
...
Describe about the maximum mode 8086 system?
In maximum mode, the 8086 is operated by connecting the MN / MX pin to ground
...
Another chip called bus controller drives the
control signals using the status information
...
Differentiate refresh cycle from memory read cycle?
a
...

b
...

c
...

d
...

83
...
I / O mapped I / O
ii
...
What is multi microprocessor system?
In order to enhance the speed of operation, an appropriate system involving several
microprocessors connected using a certain topology and is known as the multi microprocessor
architecture
...
List some configurations for physical interconnections between the processors?






Star configuration
Loop configuration
Complete interconnection
Regular topologies
Irregular topologies

461

86
...

87
...
Categorize the instructions supported by 8087?







Date transfer instructions
Arithmetic instructions
Compare instructions
Transcendental instructions
Constant returning instructions
Coprocessor control operations

89
...

90
...
What are the modes of operation of 8255?
a
...
IO Mode
i
...
Mode 1
iii
...
List the steps in the general algorithm for ADC interfacing?
462

o
o
o
o
93
...


95
...


97
...

Issue start of conversion (SOC) pulse to ADC
...

Read analog data output of the ADC as equivalent digital output
...
List the salient features of Mode0 of 8255?
 Two 8 bit ports ( Port A and Port B ) and two 4 bit ports ( Port C upper and lower) are available
...

 Any port can be used as an input or output port
...
Input ports are not latched
...

99
...

o
o
o
o
o

Group A and Group B are available for strobed data transfer
...

8bit data port can be either used as input or output port
...
PC6, PC7 may be used as independent
data lines
...

3 I / O ports are available at port C, PC2 – PC0
Inputs and outputs are both latched
...

463

101
...
Clear First / Last Flip flop
2
...
Master Clear Command

102
...
More number of CPUs can be added in a loosely coupled system to improve the
system performance
...
System structure is modular and hence easy to maintain and trouble shoot
...
Fault in a single module does not lead to a complete system break down
...
It is more fault tolerant due to independent processing modules
...
More suitable to parallel applications due to its modular organization
...


Explain PROC & ENDP
PROC directive defines the procedures in the program
...
After PROC the term NEAR or FAR are used to specify the type of
procedure
...
ENDP is used along with PROC and defines the end of
the
procedure
...


Explain SEGMENT & ENDS
An assembly program in
...
The starts of
these segments are defined by SEGMENT and the end of the segment is
indicated by
ENDS directive
...


Name ENDS
Explain TITLE & TYPE
The TITLE directive helps to control the format of a listing of an assembled program
...

Maximum 60 characters are allowed
...

TYPE operator tells the assembler to determine the type of specified variable in
bytes
...


106
...


Define variable
A variable is an identifier that is associated with the first byte of data item
...

464

108
...
The type of procedure
depends on
where the procedures are stored in memory
...


109
...
The linker produces a link file which contains the binary codes for all the
combined
modules
...
The linker does not assign absolute addresses but only relative address
starting
from zero, so the programs are relocatable & can be put anywhere in memory to be run
...


Explain about passing parameters using registers with example
Procedures process some data or address variable from the main program, for
processing it is necessary to pass the address variables or data
...
In passing parameters using registers the data to be
passed is
stored in registers & these registers are accessed in the procedure to process the data
...

What is recursive procedures
A recursive procedure is a procedure, which calls itself
...
If the procedure is
called with
N=3, then the N is decremented by 1 after each procedure CALL and the
procedure is
called until N=0
...


What are libraries
465

Library files are collection of procedures that can be used in other programs
...

The
library file is invoked when a program is linked with linker program
...
Use of
library files
increase s/w reusability & reduce s/w development time
...


What are Macros
Macro is a group of instruction
...
Macros are defined by MACRO &
ENDM
directives
...


How do 8086 interrupts occur
An 8086 interrupt can come from any of the following three sources
• External signals
• Special instructions in the program
• Condition produced by instruction

115
...


What is interrupt service routine
Interrupt means to break the sequence of operation
...
This program to which the control is
transferred is
called the interrupt service routine
...


Define BIOS
The IBM PC has in its ROM a collection of routines, each of which performs
some
specific function such as reading a character from keyboard, writing character to
CRT
...


118
...
In order that the
modules link together correctly any variable name or label referred to in other
modules
must be declared public in the module where it is defined
...

Format PUBLIC Symbol
...


Explain DUP
The DUP directive can be used to initialize several locations & to assign values
to
these locations
...
Reserves an array of 10 words of memory
and
initializes all 10 words with 0
...


120
...


What is the purpose of segment registers in 8086?
There are 4 segment registers present in 8086
...
Code Segment ( CS ) register
2
...
Stack Segment ( SS ) register
4
...
ie
...

The data segment register points out where the operands are stored in the
memory
...

If the amount of data used is more the Extra segment register points out
where the large amount of data is stored in the memory
...


Define pipelining?
In 8086, to speedup the execution of program, the instructions fetching and
execution of instructions are overlapped each other
...

In pipelining, when the n instruction is executed, the n+1
instruction is
fetched and thus the processing speed is increased
...


Discuss the function of instruction queue in 8086?
In 8086, a 6 -byte instruction queue is presented at the Bus Interface Unit
(BIU)
...
Due to this, overlapping instruction fetch with instruction
execution increases the processin g speed
...


What is the maximum memory size that can be addressed by 8086?
In 8086, an memory location is addressed by 20 bit address and the address
bus is 20 bit address and the address bus is 20 bits
...


125
...


What is the function of the signal in 8086?
BHE signal means Bus High Enable signal
...
ie
...
e
...


What are the predefined interrupts in 8086?
The various predefined interrupts are,
DIVISION BY ZERO
(type 0) Interrupt
...

NONMASKABLE
(type2) Interrupt
...

OVER FLOW
(type 4) Interrupt
...


What are the different flag available in status register of 8086?
There are 6 on e bit flags are present
...

List the various addressing modes present in 8086?
There are 12 addressing modes present in 8086
...

Direct addressing modes
Register indirect addressing modes
Based addressing modes
Indexed addressing modes
Based Indexed addressing modes
String addressing modes
(c) I/O addressing modes
Direct addressing mode
Indirect add ressing mode
(d) Relative addressing mode
(e) Implied addressing mode
129
...
In this mode,
after
the execution of each instruction s 8086 generates an internal interrupt and by writing
some interrupt service routine we can display the content of desired registers
and
memory locations
...


130
...
If the system bus is given to a processor then the LOCK signal is
made
low
...
After the use of the system bus again the LOCK signal is made high
...


131
...

(b) Fetch data from memory and I/O ports
...

469

(d) To communicate with outside world
...

132
...
What are the two modes of operations present in 8086?
i
...
Maximum mode (or) Multiprocessor system
134
...
Enables INTR of 8086
...
8086 will not respond to INTR
...
Explain REPEAT-UNTIL statements
REPEAT-UNTIL statements allow executing a series of instructions repeatedly until
some condition occurs
...
UNTIL has a condition when the condition is true the loop is terminated
136
...
Another definition is the interleaving of CPU and I/O
operations among several programs is called multiprogramming
...

This technique is known as multiprogramming
137
...
What are the three classifications of 8086 interrupts?
(1) Predefined interrupts
(2) User defined Hardware interrupts
(3) User defined software interrupts
...
What are the functions of status pins in 8086?
S2 S1 S0
0 0 0 ---- Interrupt acknowledge
0 0 1 ---- Read I/O
0 1 0 ---- Write I/O
0 1 1 ---- Halt
1 0 0 ---- Code access
1 0 1 ---- Read memory
1 1 0 ---- Write memory
1 1 1 ---- inactive
S4 S3
0 0 --I/O from extra segment
0 1 --I/O from Stack Segment
1 0 --I/O from Code segment
1 1 --I/O from Data segment
S5 --Status of interrupt enable flag
S6 --Hold ackno wledge for system bus
S7 --Address transfer
...
What are the schemes for establishing priority in order to resolve bus
arbitration problem?
There are three basic bus access control and arbitration schemes
1
...
Independent Request
3
...
What is the use of 8251 chip?
Intel‟s 8251A is a universal synchronous asynchronous receiver and transmitter
compatible with Intel‟s Processors
...
This chip converts the
parallel data into a serial stream of bits suitable for serial transmission
...

142
...
There are
471

basically there modes of data transmission
(a) Simplex
(b) Duplex
(c) Half Duplex
In simplex mode, data is transmitted only in one direction over a single
communication
channel
...

In duplex mode, data may be transferred between two transreceivers in both
directions
simultaneously
...
For
example, a
computer may communicate with a terminal in this mode
...
e
...
The message is received by the computer (i
...
However, it is not possible to transmit data from the computer to terminal
and
from terminal to the computer simultaneously
...
hat are the various programmed data transfer methods?
ii) Synchronous data transfer
iii) Asynchronous data transfer
iv) Interrupt driven d ata transfer
144
...
To transfer a data to or from the device, the user program issues
a suitable instruction addressing the device
...

146
...
Asynchronous data
transfer is
also called as Handshaking
...
What are the functional types used in control words of 8251a ?
The control words of 8251A are divided into two functional types
...
Mode Instruction control word
2
...

Command Instruction control word:-The command instruction controls the
actual operations of the selected format like enable transmit/receive, error reset
and
modem control
...
What are the basic modes of operation of 8255?
There are two basic modes of operation of 8255, viz
...
I/O mode
...
BSR mode
...
Under the IO mode of operation, further there are three modes of operation of
8255, So as to support different types of applications, viz
...

Mode 0 Basic I/O mode
Mode 1 Strobed I/O mode
Mode 2 Strobed bi-directional I/O
149
...
Two 8-bit ports (port A and port B) and two 4-bit ports (port C upper and lower)
are available
...

2
...

3
...
Input ports are not latched
...
A maximum of four ports are available so that overall 16 I/O configurations are
possible
...
What are the features used mode 1 in 8255?
Two groups – group A and group B are available for strobed data transfer
...
Each group contains one 8-bit data I/O port and one 4-bit control/data port
...
The 8-bit data port can be either used as input or output port
...

3
...
The lines PC6, PC7 may
be used as independent data lines
...
What are the signals used in input control signal & output control signal?
Input control signal
STB (Strobe input)
IBF (Input buffer full)
INTR(Interrupt request)
Output control signal
OBF (Output buffer full)
ACK (Acknowledge input)
INTR(Interrupt request)
152
...

473

1
...

2
...

3
...

4
...

153
...

1
...
Mode 1 (Programmable monoshot)
3
...
Mode 3 (Square wave generator)
5
...
Mode 5 (Hardware triggered strobe)
154
...
The control word register contents are used for
(a) Initializing the operating modes (mode 0-mode4)
(b) Selection of counters (counter 0- counter 2)
(c) Choosing binary /BCD counters
(d) Loading of the counter registers
...


155
...
Initialization command words (ICWs)
2
...
Give the operating modes of 8259a?
(a) Fully Nested Mode
(b) End of Interrupt (EOI)
(c) Automatic Rotation
(d) Automatic EOI Mode
(e) Specific Rotation
(f) Special Mask Mode
(g) Edge and level Triggered Mode
(h) Reading 8259 Status
(i) Poll command
474

(j) Special Fully Nested Mode
(k) Buffered mode
(l) Cascade mode
156
...
In
the encoded mode, the counter provides binary count that is to be externally
decoded to provide the scan lines for keyboard and display
...
The keyboard and display both are in the
same mode at a time
...
What is the output modes used in 8279?
8279 provides two output modes for selecting the display options
...
Display Scan
In this mode, 8279 provides 8 or 16 character-multiplexed displays those
can be organized as dual 4-bit or single 8-bit display units
...
Display Entry
8279 allows options for data entry on the displays
...

158
...
Scanned Keyboard mode with 2 Key Lockout
...
Scanned Keyboard with N-key Rollover
...
Scanned Keyboard special Error Mode
...
Sensor Matrix Mode
...
What are the modes used in display modes?
1
...

2
...

160
...

161
...

Each of the four channels of 8257 has a pair of two 16-bit registers
...
Also, there are two common registers for all
the channels; namely, mode set registers and status register
...
The CPU selects one of these ten registers using address lines A - A
...
What is the function of DMA address register?
Each DMA channel has one DMA address register
...
Thus the starting address of the memory block that will be
accessed by the device is first loaded in the DMA address register of the channel
...

163
...
This
16-bit register is used for ascertaining that the data transfer through a DMA
channel ceases or stops after the required number of DMA cycles
...
What is the function of mode set register in 8257?
The mode set register is used for programming th e 8257 as per the
requirements
of the system
...

165
...
Data transfer between any
General-purpose register and I/O
port
...
The memory map (64K) is
Shared between I/O device and
system memory
...
Arithmetic or logic operation can
be directly performed with I/O
data

Arithmetic or logical operation
cannot be directly performed with
I/O data

166
...
O Mode
i
...

ii
...
Mode 2-Strobed bidirectional mode
b) Bit Set/Reset Mode
...
What is a control word?
476

It is a word stored in a register (control register) used to control the operation of a
program digital device
...
What is the purpose of control word written to control register in 8255?
The control words written to control register specify an I/O function for each
I
...
The bit D of the control word determines either the I/O function of the
7
BSR function
...
What is the size of ports in 8255?
Port-A : 8-bits
Port-B : 8-bits
Port-C : 4-bits
U
Port-C : 4-bits
L
170
...
Interfacing is the process of making two different systems
communicate
with each other
...
What is memory mapping?
The assignment of memory addresses to various registers in a memory chip is
called as memory mapping
...
What is I/O mapping?
The assignment of addresses to various I/O devices in the memory chip is
called as I/O mapping
...
What is an USART?
USART stands for universal synchronous/Asynchronous Receiver/
Transmitter
...

174
...

175
...

Keyboard/Display
176
...

a
...
Scan section
c
...
CPU interface section

477

177
...
When a key is
pressed the contact bounce back and forth and settle down only after a small time
delay (about 20ms)
...
This problem is called Key Bouncing
...
Define HRQ?
The hold request output requests the access of the system bus
...
In
cascade
mode, this pin of a slave is connected with a DRQ input line of the master
8257,
while that of the master is connected with HOLD input of the CPU
...
What is the use of stepper motor?
A stepper motor is a device used to obtain an accurate position control of
rotating shafts
...

180
...

181
...

182
...

OUT NULL RW1 RW0 M2 M1 M0 BCD
183
...

184
...
Each node of the crossbar rep resents a bus switch
...

185
...
They are required to separate the valid data from the time multiplexed
address data signal
...
e DEN & DT/R
...
What are the different inter connection topologies?
• Shared bus
• Multiport Memory
• Linked Input/ Output
• Bus window
• Crossbar Switching
...
What are the configurations used for physical interconnections?
• Star Configuration
• Loop con figuration
• Complete interconnection
• Regular topologies
• Irregular topologies

188
...
Data Transfer Instructions
2
...
Comparison Instructions
...
Transcendental Operations
...
Constant Operations
...
Coprocessor Control Operations
...
Write the advantages of loosely coupled system over tightly coupled
systems?
1
...
The system structure is modular and hence easy to maintain and troubleshoot
...
A fault in a single module does not lead to a complete system breakdown
...
What is the different clock frequencies used in 80286?
Various versions of 802 86 are available that run on 12
...

191
...
This is called
„swapping in‟ of the program
...
What are the different operating modes used in 80286?
The 80286 works in two operating modes
1
...
Protected virtual address mode
...
What are the CPU contents used in 80286?
The 80286 CPU contains almost the same set of registers, as in 8086
479

•
•
•
•

Eight 16-bit general purpose register
Four 16-bit segment registers
Status and control register
Instruction pointer
...
What is status flag bit?
The flag register reflects the results of logical and arithmetic instructions
...
These are called as
status flag bits
...
What is a control flag?
The bits D8 and D9 namely, trap flag (TF) and interrupt flag ( IF) bits, are used
for controlling machine operation and thus they are called control flags
...
What is instruction pipelining?
Major function o f the bus unit is to fetch instruction bytes from th e memory
...
This concept is known as instruction pipelining
...
What is swapping?
The procedure of fetching the chosen program segments or data from the
secondary storage into the physical memory is called „swapping‟
...
What are the functions of bus interface unit (BIU) in 8086?
(a) Fetch instructions from memory
...

(c) Write data to memory and I/O ports
...

(e) Provide external bus operations and bus control signals
199
...
What are the 8086 interrupt types?
Dedicated interrupts
· Type 0: Divide by zero interrupt
· Type 1: Single step interrupt
· Type 2:Non maskable interrupt
· Type 3: Breakpoint
· Type 4: Overflow interrupt
Software interrupts
· Type 0-255

480

201
...
This
collection of routines is referred to as Basic Input Output System or BIOS
...
Explain DJNZ instructions of intel 8051 microcontroller?
a) DJNZ Rn, rel
Decrement the content of the register Rn and jump if not zero
...

2
...
Give the alternate functions for the port pins of port3?
RD – Read data control output
...

T1 – Timer / Counter1 external input or test pin
...

INT1- Interrupt 1 input pin
...

TXD – Transmit data pin for serial port in UART mode
...
Explain the function of the pins PSEN and EA of 8051
...
In 8051 based system in which an
external ROM holds the program code, this pin is connected to the OE pin of the ROM
...
When the EA pin is connected to Vcc,
program fetched to addresses 0000H through 0FFFH are directed to the internal ROM
and program fetches to addresses 1000H through FFFFH are directed to external
ROM/EPROM
...

5
...

DPTR:
DPTR stands for data pointer
...
Its function is to hold a 16-bit address
...
It serves as a base
register in indirect jumps, lookup table instructions and external data transfer
...
SP is a 8- bit wide register
...
The stack array can
reside anywhere in on-chip RAM
...
This causes the stack to begin at location 08H
...
List the applications of microcontroller
...
Define XTAL1 and XTAL2
...
XTAL1 is the input of amplifier and XTAL2 is the output of the amplifier
...
Compare Microprocessor and Microcontroller
...


circuit and interrupt circuit
...


and CPU
It has one or two bit handling

It has many bit handling instructions
...


Microprocessor based system

Microcontroller based system requires

requires more hardware
...


9
...

483





Size is small
...

System is more reliable
...
Name the five interrupt sources of 8051?
The interrupts are:Vector address






External interrupt 0 : IE0 : 0003H
Timer interrupt 0 : TF0 : 000BH
External interrupt 1 : IE1 : 0013H
Timer I terrupt 1 : TF1 : 001BH
n
Serial Interrupt

11
...


12
...

4096 bytes program memory on-chip
...

4 register banks
2 multiple modes, 16 bit timer/counter
Extensive Boolean processing capabilities
...

32 bi-directional I/O lines
...
Explain the operating mode 0 of 8051 serial port?
In this mode serial data enters and exists through RXD, TXD outputs the shift clock
...
The baud rate is fixed at 1/12 the oscillator
frequency
...
Explain the operating mode 2 of 8051 serial port?
In this mode 11 bits are transmitted (through TXD) or received (through (RXD): a start bit(0), 8
data bits( LSB first), a programmable 9th data bit and a stop bit(1)
...
On receive, the9th data bit go into
the RB8 in special function register SCON, while the stop bit is ignored
...


15
...
It is same as mode 2 except the
baud rate
...


16
...
How many bytes of internal RAM and ROM supported by 8051 micro controller?
128 bytes of internal RAM and 4 bytes of ROM
...
Define machine cycle of 8051?
8051 machine cycle consists of 6 states, S1 through S7
...

Thus 12 clock period constitute one machine cycle
...


19
...

When ALE is enabled, the address on port 0 pins are latched and bus is ready to act asa data bus
when ALE is low
...
What are the alternative function of port 3 of 8051?
Serial data input (P3
...
1), external interrupt 0 (P3
...
3), external input for timer 0(P3
...
5), external memory write
pulse (P3
...
7) are the alternative functions of port 3
...
What are the use of scratch pad area of internal RAM of 8051?
In internal RAM 80 bytes constitutes the scratch pad area
...


22
...
What is meant by Power-on- Reset in 8051 controller?
When RESET pin is activated, the 8051 jumps to address location 0000H
...
Reset pin is considered as a sixth interrupt source of 8051
...
What are the significance of SFRs?
SFRs denotes Special function Registers of8051 controller
...


25
...
Write a program to mask the 0th and 7th bit using 8051?
MOV A,#data
ANL A,#81
MOV DPTR,#4500
MOVX @DPTR,A LOOP:

SJMP LOOP

27
...
Write about CALL statement in 8051?
There are two CALL instructions
...
Write about the jump statement?
There are three forms of jump
...
Write a program to find the 2‟s complement using 8051?
MOV A, R0
CPL A INC A

31
...
Write a program to subtract two numbers & exchange the digits using 8051?
MOV A,#9F MOV R0,#40
SUBB A,R0
SWAP A

33
...
Comparison between full address decoding and Partial address decoding?

Full address decoding
1
...
Few higher address lines are decoded

select the memory or I/O device
...


2
...
Hardware required to design decoding

488

decoding logic
...
Higher cost for decoding circuit
...
Less cost for decoding circuit
...
No multiple addresses
...
It has a disadvantage of multiple
addresses
...
Used in large systems
...
Used in small systems
...
What is the significance of wait state generator?
This is used to transfer data between slower I/O device and the microprocessor
...
So the
microprocessor has to confirm whether the peripheral is ready or not
...


36
...
Eg: TRAP

37
...
It may be manipulated as a 16-bit data register or as independent 8-bit
registers
...

38
...
Input modes




Scanned keyboard
Scanned sensor matrix
Strobed input
489

2
...
What are the different functional units in 8279?





CPU interface section
Keyboard section
Display section
Scan section
40
...
Rotating Priority mode
Special Masked mode e
...
What is IMR(Interrupt mask register)?
IMR stores the masking bits of the interrupt lines to be masked
...


42
...


43
...
The eight interrupt inputs sets corresponding bits of the Interrupt Request Register upon
the service request
...
What is Interrupt service register(ISR)?
The interrupt service register stores all the levels that are currently being serviced
...
What is the difference between SHLD and LHLD?
SHLD- Store HL register pair in memory
...

LHLD- Load HL register pair from memory
...


46
...

LDAX rp – Load Accumulator register (A) with the contents of memory location whose address
is specified byBC or DE register pair
...
Write an assembly language program to transfer data from memory block
B1 to memory block B2?
MVI C,0AH; Initialize counter
LXI H, 2200H; Initialize source memory pointer
LXI D, 2300H; Initialize destination memory pointer
Loop:

MOV A,M; Get byte from source memory block

STAX D; Store byte in the destination memory block
INX H; Increment source memory pointer
INX D; Increment destination memory pointer
DCR C; Decrement counter
JNZ Loop ; If counter ≠ 0 repeat

491

HLT

48
...
Write an assembly language program to add 2 BCD numbers?

LXI H,2200H; Initialize pointer
MOV A,M ; Get the first number
INX H; Increment the pointer
ADD M ; Add two numbers
DAA ; Convert HEX to valid
BCD STA 2300; store the result
HLT
50
...
The rp
is 16 – bit register pairs such as BC, DE, HL or stack pointer
...
Write the difference between LDA and STA instruction?



LDA – Load data in to Accumulator register(A) directly from the address specified with
in the instruction
...


52
...
What are the operating modes of 8255?
Bit set/Reset mode
I/O modes
a)mode 0 : Simple input/output
b)mode 1 : Input/output with handshake
c)mode 2 : Bi-directional I/O data transfer

54
...
What is the use of SWAP function in 8051?
SWAP A : Swap nibbles with in the Accumulator bytes
...
What is SCON?
SCON is the serial port control register , which contains not only the mode selection bits (SM0 –
SM2 ,REN), but also the 9th data bit for transmit and receive (TB8 and RB8) and the serial port
interrupt bits (TI and RI)
...
How we calculate the Baud rate for serial port in mode 0?
Baud Rate = Oscillator frequency/12

58
...
Clock output in shift register mode
...
Data I/O pin in shift register mode
...
Write two examples of Register indirect Addressing modes in 8051?
MOV A,@R0 ; Load thecontents pointed by R0 in A
...


60
...
It holds a source operand and receives the result of the arithmetic
instructions (Addition, Subtraction, Multiplication and Division)
61
...

 A large size PCB is required for assembling all the components, resulting in an enhanced
cost of the system
...

 Physical size of the product is big and it is not handy
...
What are the advantages of microcontroller based system design?
As the peripherals are integrated into a single chip, overall system cost is very low
...

System design requires little efforts to trouble shoot and maintain
...

Microcontrollers with on chip ROM provide a software security feature
...
Define a microcontroller?
Integrating a microprocessor along with I / O ports and minimum memory in a single package,
with peripheral, a programmable timer to make a self sufficient device is called the microcontroller
...
List the I / O ports available in 8051?
Port0
Port1
Port2
Port3
65
...

66
...
Give the five sources of interrupts of 8051?
o External interrupts INT0, INT1
o Timer interrupts TIMER0, TIMER1
o Serial port interrupt (TI)

68
...
Define direct addressing of 8051?
The operands are specified using the 8bit address field in the instruction format
...

70
...


495

Ex: ADD A,@R0
71
...

Ex: ADD A, R7
72
...
Some of
the instructions always operate on a specific register
...
What are the types of register set available in 8051?
Bit addressable registers
Byte addressable registers
List the registers available in 8051?
8051 has twenty one 8bit, bit addressable registers
...


74
...

b) DJNZ direct , rel
Decrement the content o f direct 8-bit address and jump if not zero
...
State the function of RS1 and RS0 bits in the flag register of intel 8051
microcontroller?
RS1 , RS0 – Register bank select bits
RS1 RS0 Bank Selection
0
0
Bank 0
0
1
Bank 1
1
0
Bank 2
1
1
Bank 3
76
...

MOV DPL,#55H
MOV A, DPL
RL A
Lab el :SJMP label
77
...

WR – Write data control output
...

T0 – Timer / Counter0 external input or test pin
...

INT 0 – Interrupt 0 input pin
...

RXD - Receive data pin for serial port in UART mode
...
Specify the single instruction, which clears the most significant bit of B register of 8051,
without affecting the remaining bits
...
7
...
Explain the function of the pins PSEN and EA of 8051
...
In 8051 based system
in which an external ROM holds the program code, this pin is connected to the
OE pin of the ROM
...
When the EA pin is connected to Vcc,
program fetched to addresses 0000H through 0FFFH are directed to the internal
ROM and program fetches to addresses 1000H through FFFFH are directed to
external ROM/EPROM
...


80
...

DPTR:
DPTR stands for data pointer
...
Its function is to hold a 16-bit address
...
It serves as a base
register in indirect jumps, lookup table instructions and external data transfer
...
SP is a 8- bit wide register
...
The stack array can
reside anywhere in on-chip RAM
...
This causes the stack to begin at location
08H
...
Name the special functions registers available in 8051
...

• Stack Pointer
...

497

•
•
•
•
•
•

Port 0
Port 1
Port 2
Port 3
Interrupt priority control register
...


82
...

ET1 EX1 ET0 EX0
EA- Enable all control bit
...

ES – Enable serial port control bit
...

EX1- Enable external interrupt1 control bit
...

EX0- Enable external interrupt0 control bit
...
Compare Microprocessor and Microcontroller
...

circuit and interrupt circuit
...


It has one or two instructions to move
data between memory and CPU
...


It has man y bit handling instructions
...


Less access times for built-in memor y
and I/O devices
...

increasing the reliability
...
Name the five interrupt sources of 8051?
...
Explain the contents of the accumulator after the execution of the following
program segments :
MOV A,#3CH
MOV R4,#66H
ANL A,R4
85
...

MOV A,#30
MOV DPH,A
MOV DPL,A
86
...

MOV PSW,#10
MOV A,R0
MOV PSW,#00
SUBB A,R1
87
...
Hence for interfacing TTL devices to RS-232C serial bus, level converters are
used
...

88
...

a
...

b
...

c
...

d
...

e
...

89
...

*4096 bytes program memory on chip(not on 8031)
*128 data memory on chip
...

*Two multiple mode,16-bit timer/counter
...

*64 KB external RAM size
*32 bi-directional individually addressable I/O lines
...

90
...

The numeric execution unit executes all the numeric processor instructions while
the control unit (CU) receives, decodes instructions, reads and writes memory
operands and executes the 8087 control instructions
...
Give the disadvantages of bus window technique?
The numeric execution unit executes all the instructions including arithmetic,
logical transcendental, and data transfer instructions
...

92
...

This is called „swapping out‟ of the executable program

---

Title: MICROPROCESSORS AND MICROCONTROLLERS
Description: MICROPROCESSORS AND MICROCONTROLLERS contains total theory about 8085,8086 and 8051. it includes architecture,programming,interfacing,explanations and two marks questions and answers with easy method.

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